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Impact of technology scaling in the clock system power
D. Duarte
,
V. Narayanan
, M. J. Irwin
School of Electrical Engineering and Computer Science
Institute for Computational and Data Sciences (ICDS)
Computer Science and Engineering
Research output
:
Chapter in Book/Report/Conference proceeding
›
Conference contribution
32
Scopus citations
Overview
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Keyphrases
System Energy
100%
Technology Scaling
100%
Technology Effect
100%
Leakage Current
33%
Circuitry
33%
Relative Impact
33%
Capacitance
33%
Energy Model
33%
Comprehensive Framework
33%
Microprocessor
33%
Power Budget
33%
Overall System
33%
Leakage Power
33%
Clock Power
33%
Clock Generation
33%
Clock Distribution
33%
Chip-level
33%
Engineering
Energy Engineering
100%
Power Engineering
100%
System Clock
100%
Microprocessor Chips
50%
Electric Power Utilization
50%
Power Budget
50%
Energy Systems
50%
Subsystems
50%