TY - GEN
T1 - Impact of total and partial dipole switching on the switching slope of gate-last negative capacitance FETs with ferroelectric hafnium zirconium oxide gate stack
AU - Sharma, P.
AU - Tapily, K.
AU - Saha, A. K.
AU - Zhang, J.
AU - Shaughnessy, A.
AU - Aziz, A.
AU - Snider, G. L.
AU - Gupta, S.
AU - Clark, R. D.
AU - Datta, S.
N1 - Publisher Copyright:
© 2017 JSAP.
PY - 2017/7/31
Y1 - 2017/7/31
N2 - We report, for the first time, a gate last process, used to fabricate Negative Capacitance field effect transistors (NCFETs) with Hf0.5Zr0.5O2 (HZO) as ferroelectric (FE) dielectric in a metal/ferroelectric/insulator/semiconductor (MFIS) configuration. Long channel NCFET's with HZO thickness down to 5 nm exhibit consistent switching behavior with switching slope (SSrev) below kT/q over four decades of drain current. Temperature dependent transport study shows that, the effective mobility of HZO NCFETs is 15 % higher than that of HfO2 based control MOSFETs due to suppression of Hf diffusion into the interfacial SiO2 layer (IL). Using the Preisach hysteresis model, which models dynamics of FE switching through a cluster of independent switching dipoles at arbitrary electric field, we (a) explain the asymmetric SS behavior of NCFETs in MFIS configuration, and (b) establish design guidelines for achieving sub-kT/q SS in both forward and reverse sweep direction.
AB - We report, for the first time, a gate last process, used to fabricate Negative Capacitance field effect transistors (NCFETs) with Hf0.5Zr0.5O2 (HZO) as ferroelectric (FE) dielectric in a metal/ferroelectric/insulator/semiconductor (MFIS) configuration. Long channel NCFET's with HZO thickness down to 5 nm exhibit consistent switching behavior with switching slope (SSrev) below kT/q over four decades of drain current. Temperature dependent transport study shows that, the effective mobility of HZO NCFETs is 15 % higher than that of HfO2 based control MOSFETs due to suppression of Hf diffusion into the interfacial SiO2 layer (IL). Using the Preisach hysteresis model, which models dynamics of FE switching through a cluster of independent switching dipoles at arbitrary electric field, we (a) explain the asymmetric SS behavior of NCFETs in MFIS configuration, and (b) establish design guidelines for achieving sub-kT/q SS in both forward and reverse sweep direction.
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U2 - 10.23919/VLSIT.2017.7998160
DO - 10.23919/VLSIT.2017.7998160
M3 - Conference contribution
AN - SCOPUS:85028059471
T3 - Digest of Technical Papers - Symposium on VLSI Technology
SP - T154-T155
BT - 2017 Symposium on VLSI Technology, VLSI Technology 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 37th Symposium on VLSI Technology, VLSI Technology 2017
Y2 - 5 June 2017 through 8 June 2017
ER -