Abstract
The impact of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) is evaluated by determining limits and benefits, in terms of the potential leakage reduction, performance penalty, and area and power overhead in 0.25um, 0.18um, and 0.07um technologies. HSPICE simulation results and estimations with various functional units and memory structures are presented to support a comprehensive analysis.
Original language | English (US) |
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Pages (from-to) | 187-190 |
Number of pages | 4 |
Journal | Proceedings - Design Automation Conference |
DOIs | |
State | Published - 2003 |
Event | Proceedings of the 40th Design Automation Conference - Anaheim, CA, United States Duration: Jun 2 2003 → Jun 6 2003 |
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Control and Systems Engineering