Improvements in noise suppression for I/O circuits using embedded planar capacitors

Prathap Muthana; Krishna Srinivasan; Arif Ege Engin; Madhavan Swaminathan; Rao Tummala; Venkatesh Sundaram; Boyd Wiedenman; Daniel I. Amey; Karl H. Dietz; Sounak Banerji

doi:10.1109/TADVP.2008.920651

Improvements in noise suppression for I/O circuits using embedded planar capacitors

Prathap Muthana, Krishna Srinivasan, Arif Ege Engin, Madhavan Swaminathan, Rao Tummala, Venkatesh Sundaram, Boyd Wiedenman, Daniel I. Amey, Karl H. Dietz, Sounak Banerji

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

27 Scopus citations

Abstract

The performance of embedded planar capacitors in noise suppression of input/output (I/O) circuits and improvements in board impedance profile have been investigated in this paper. Simultaneous switching noise (SSN) is a critical issue in today's systems and this paper shows performance improvements by introducing thin planar embedded capacitors in the board stack up. Measurement and modeling results by including the effects of transmission lines and the power ground plane pairs in the board stack up in the gigahertz range quantify the performance of the embedded capacitors.

Original language	English (US)
Pages (from-to)	234-245
Number of pages	12
Journal	IEEE Transactions on Advanced Packaging
Volume	31
Issue number	2
DOIs	https://doi.org/10.1109/TADVP.2008.920651
State	Published - May 2008

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/TADVP.2008.920651

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title = "Improvements in noise suppression for I/O circuits using embedded planar capacitors",

abstract = "The performance of embedded planar capacitors in noise suppression of input/output (I/O) circuits and improvements in board impedance profile have been investigated in this paper. Simultaneous switching noise (SSN) is a critical issue in today's systems and this paper shows performance improvements by introducing thin planar embedded capacitors in the board stack up. Measurement and modeling results by including the effects of transmission lines and the power ground plane pairs in the board stack up in the gigahertz range quantify the performance of the embedded capacitors.",

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AU - Engin, Arif Ege

AU - Swaminathan, Madhavan

AU - Tummala, Rao

AU - Sundaram, Venkatesh

AU - Wiedenman, Boyd

AU - Amey, Daniel I.

AU - Dietz, Karl H.

AU - Banerji, Sounak

PY - 2008/5

Y1 - 2008/5

N2 - The performance of embedded planar capacitors in noise suppression of input/output (I/O) circuits and improvements in board impedance profile have been investigated in this paper. Simultaneous switching noise (SSN) is a critical issue in today's systems and this paper shows performance improvements by introducing thin planar embedded capacitors in the board stack up. Measurement and modeling results by including the effects of transmission lines and the power ground plane pairs in the board stack up in the gigahertz range quantify the performance of the embedded capacitors.

AB - The performance of embedded planar capacitors in noise suppression of input/output (I/O) circuits and improvements in board impedance profile have been investigated in this paper. Simultaneous switching noise (SSN) is a critical issue in today's systems and this paper shows performance improvements by introducing thin planar embedded capacitors in the board stack up. Measurement and modeling results by including the effects of transmission lines and the power ground plane pairs in the board stack up in the gigahertz range quantify the performance of the embedded capacitors.

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Improvements in noise suppression for I/O circuits using embedded planar capacitors

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