Increasing FPGA resilience against soft errors using task duplication

G. Chen, F. Li, M. Kandemir, I. Demirkiran

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

Reconfigurable computing systems are becoming increasingly widespread as they bring the flexibility of programmable systems and approach the performance of ASICs. While the prior research on FPGAs mainly studied issues such as performance, power, and area optimization, reliability related issues have not taken much attention. However, with increasing soft error rates, providing resilience to soft errors in FPGA based embedded platforms is becoming an increasingly important issue. This paper proposes an OS-directed task duplication scheme for increasing reliability by providing resilience against soft errors. The idea is to exploit the unused portions of the FPGA space to schedule duplicates of active tasks. The outputs of the primary and duplicate tasks are compared to check for the existence of soft errors.

Original languageEnglish (US)
Title of host publicationProceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages924-927
Number of pages4
ISBN (Print)0780387368, 9780780387362
DOIs
StatePublished - 2005
Event2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, China
Duration: Jan 18 2005Jan 21 2005

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2

Other

Other2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
Country/TerritoryChina
CityShanghai
Period1/18/051/21/05

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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