Abstract
This paper reports on a new form of process-induced damage to submicron MOS transistors caused by metal 1 plasma etching. This form of damage, herein referred to as 'inductive damage', is suggested to arise from inductive coupling between interconnect circuitry and time-varying magnetic fields during plasma exposure. The occurrence of inductive damage is demonstrated through the use of specially designed test structures consisting of fuse-attached metal loops acting as inductive antennas and connecting the gate and substrate of n-channel and p-channel MOSFETs. The MOSFETs, with lightly doped drains and channel lengths of 0.25 μm and 0.50 μm, are fabricated on 200 mm p/p+ silicon wafers using a full CMOS process flow. The metal 1 etch step was carried out using a BCl3/N2/Cl2 plasma in a magnetically-enhanced reactive ion etching (MERIE) tool.
Original language | English (US) |
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Title of host publication | International Symposium on Plasma Process-Induced Damage, P2ID, Proceedings |
Publisher | IEEE |
Pages | 131-132 |
Number of pages | 2 |
State | Published - 1996 |
Event | Proceedings of the 1996 1st International Symposium on Plasma Process-Induced Damage, P2ID - Santa Clara, CA, USA Duration: May 13 1996 → May 14 1996 |
Other
Other | Proceedings of the 1996 1st International Symposium on Plasma Process-Induced Damage, P2ID |
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City | Santa Clara, CA, USA |
Period | 5/13/96 → 5/14/96 |
All Science Journal Classification (ASJC) codes
- General Engineering