Abstract
Designing cost-effective and scalable on-chip multi-processors demand careful attention be paid to software. In particular, if not optimized, the energy consumption due to interprocessor communication can be overwhelming. In this paper, we focus on array-intensive applications and study the energy impact of inter-processor communication optimizations on a private memory based on-chip multi-processor. Our results emphasize the importance of considering both computation energy and communication energy when applying optimizations that reduce inter-processor communication.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings - IEEE International SOC Conference, SOCC 2003 |
| Editors | Dong S. Ha, Richard Auletta, John Chickanosky |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 255-256 |
| Number of pages | 2 |
| ISBN (Electronic) | 0780381823, 9780780381827 |
| DOIs | |
| State | Published - 2003 |
| Event | IEEE International SOC Conference, SOCC 2003 - Portland, United States Duration: Sep 17 2003 → Sep 20 2003 |
Publication series
| Name | Proceedings - IEEE International SOC Conference, SOCC 2003 |
|---|
Other
| Other | IEEE International SOC Conference, SOCC 2003 |
|---|---|
| Country/Territory | United States |
| City | Portland |
| Period | 9/17/03 → 9/20/03 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
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