TY - JOUR
T1 - Influence of compiler optimizations on system power
AU - Kandemir, Mahmut
AU - Vijaykrishnan, N.
AU - Irwin, Mary Jane
AU - Ye, Wu
N1 - Funding Information:
Manuscript received October 6, 2000; revised June 1, 2001. This work was supported in part by NSF Grants 970518, 0082064, 0093082, 0093085, and 0073419. The authors are with Microsystems Design Lab, The Pennsylvania State University, University Park, PA 16802 USA (e-mail: {[email protected]; [email protected]; [email protected]; [email protected]). Publisher Item Identifier S 1063-8210(01)08003-9.
PY - 2001/12
Y1 - 2001/12
N2 - Optimizing for energy constraints is of critical importance due to the proliferation of battery-operated embedded devices. Thus, it is important to explore both hardware and software solutions for optimizing energy. The focus of high-level compiler optimizations has traditionally been on improving performance. In this paper, we present an experimental evaluation of several state-of-the-art high-level compiler optimizations on energy consumption, considering both the processor core (datapath) and memory system. This is in contrast to many of the previous works that have considered them in isolation.
AB - Optimizing for energy constraints is of critical importance due to the proliferation of battery-operated embedded devices. Thus, it is important to explore both hardware and software solutions for optimizing energy. The focus of high-level compiler optimizations has traditionally been on improving performance. In this paper, we present an experimental evaluation of several state-of-the-art high-level compiler optimizations on energy consumption, considering both the processor core (datapath) and memory system. This is in contrast to many of the previous works that have considered them in isolation.
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U2 - 10.1109/92.974893
DO - 10.1109/92.974893
M3 - Article
AN - SCOPUS:0035704561
SN - 1063-8210
VL - 9
SP - 801
EP - 804
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 6
ER -
