Information theoretic SOP expression minimization technique

The efficient design of multiple Boolean functions is becoming important and necessary during Computer Aided Design for Circuit and Systems (CADCS), especially the manufacture of chips have reached a density of several ten thousands transistors per chip, so called Very Large Scale Integration (VLSI). To simplify the Boolean expressions by conventional approaches like graphical observation-based K-MAP or other simplification procedures become tedious or even impossible when the number of variables in a truth table exceeds certain limit. In this paper we propose an information theory based circuit designing approach for deriving minimal Sum of Product (SOP) expressions for unlimited number of variable. We have verified our approach on a number of cases with the conclusion that the proposed approach is a better alternative to conventional approaches particularly when the numbers of variables restrict the use of conventional approaches. The key feature of proposed method is that it performs a hill-climbing search through the state space of Boolean variables using information theoretic heuristic to find the minimal SOP expression.