TY - GEN
T1 - Inverse-Transpilation
T2 - 35th Edition of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025
AU - Kundu, Satwik
AU - Ghosh, Swaroop
N1 - Publisher Copyright:
© 2025 Copyright held by the owner/author(s). Publication rights licensed to ACM.
PY - 2025/6/29
Y1 - 2025/6/29
N2 - Circuit compilation, a crucial process for adapting quantum algorithms to hardware constraints, often operates as a "black box,"with limited visibility into the optimization techniques used by proprietary systems or advanced open-source frameworks. Due to fundamental differences in qubit technologies, efficient compiler design is an expensive process, further exposing these systems to various security threats. In this work, we take a first step toward evaluating one such challenge affecting compiler confidentiality, specifically, reverse-engineering compilation methodologies. We propose a simple ML-based framework to infer underlying optimization techniques by leveraging structural differences observed between original and compiled circuits. The motivation is twofold: (1) enhancing transparency in circuit optimization for improved cross-platform debugging and performance tuning, and (2) identifying potential intellectual property (IP)-protected optimizations employed by commercial systems. Our extensive evaluation across thousands of quantum circuits shows that a neural network performs the best in detecting optimization passes, with individual pass F1-scores reaching as high as 0.96. Thus, our initial study demonstrates the viability of this threat to compiler confidentiality and underscores the need for active research in this area.
AB - Circuit compilation, a crucial process for adapting quantum algorithms to hardware constraints, often operates as a "black box,"with limited visibility into the optimization techniques used by proprietary systems or advanced open-source frameworks. Due to fundamental differences in qubit technologies, efficient compiler design is an expensive process, further exposing these systems to various security threats. In this work, we take a first step toward evaluating one such challenge affecting compiler confidentiality, specifically, reverse-engineering compilation methodologies. We propose a simple ML-based framework to infer underlying optimization techniques by leveraging structural differences observed between original and compiled circuits. The motivation is twofold: (1) enhancing transparency in circuit optimization for improved cross-platform debugging and performance tuning, and (2) identifying potential intellectual property (IP)-protected optimizations employed by commercial systems. Our extensive evaluation across thousands of quantum circuits shows that a neural network performs the best in detecting optimization passes, with individual pass F1-scores reaching as high as 0.96. Thus, our initial study demonstrates the viability of this threat to compiler confidentiality and underscores the need for active research in this area.
UR - https://www.scopus.com/pages/publications/105017569969
UR - https://www.scopus.com/pages/publications/105017569969#tab=citedBy
U2 - 10.1145/3716368.3735298
DO - 10.1145/3716368.3735298
M3 - Conference contribution
AN - SCOPUS:105017569969
T3 - Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
SP - 273
EP - 277
BT - GLSVLSI 2025 - Proceedings of the Great Lakes Symposium on VLSI 2025
PB - Association for Computing Machinery
Y2 - 30 June 2025 through 2 July 2025
ER -