Investigating memory system energy behavior using software and hardware optimizations

G. Esakkimuthu; H. S. Kim; M. Kandemir; N. Vijaykrishnan; M. J. Irwin

doi:10.1155/2001/70310

Investigating memory system energy behavior using software and hardware optimizations

G. Esakkimuthu, H. S. Kim, M. Kandemir, N. Vijaykrishnan, M. J. Irwin

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

Memory system usually consumes a significant amount of energy in many battery-operated devices. In this paper, we provide a quantitative comparison and evaluation of the interaction of two hardware cache optimization mechanisms and three widely used compiler optimization techniques used to reduce the memory system energy. Our presentation is in two parts. First, we focus on a set of memory-intensive benchmark codes and investigate their memory system energy behavior due to data accesses under hardware and compiler optimizations. Then, using four motions estimation codes, we look at the influence of compiler optimizations on the memory system energy considering the overall impact of instruction and data accesses.

Original language	English (US)
Pages (from-to)	151-165
Number of pages	15
Journal	VLSI Design
Volume	12
Issue number	2
DOIs	https://doi.org/10.1155/2001/70310
State	Published - 2001

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

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10.1155/2001/70310

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AU - Kim, H. S.

AU - Kandemir, M.

AU - Vijaykrishnan, N.

AU - Irwin, M. J.

PY - 2001

Y1 - 2001

N2 - Memory system usually consumes a significant amount of energy in many battery-operated devices. In this paper, we provide a quantitative comparison and evaluation of the interaction of two hardware cache optimization mechanisms and three widely used compiler optimization techniques used to reduce the memory system energy. Our presentation is in two parts. First, we focus on a set of memory-intensive benchmark codes and investigate their memory system energy behavior due to data accesses under hardware and compiler optimizations. Then, using four motions estimation codes, we look at the influence of compiler optimizations on the memory system energy considering the overall impact of instruction and data accesses.

AB - Memory system usually consumes a significant amount of energy in many battery-operated devices. In this paper, we provide a quantitative comparison and evaluation of the interaction of two hardware cache optimization mechanisms and three widely used compiler optimization techniques used to reduce the memory system energy. Our presentation is in two parts. First, we focus on a set of memory-intensive benchmark codes and investigate their memory system energy behavior due to data accesses under hardware and compiler optimizations. Then, using four motions estimation codes, we look at the influence of compiler optimizations on the memory system energy considering the overall impact of instruction and data accesses.

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Investigating memory system energy behavior using software and hardware optimizations

Abstract

All Science Journal Classification (ASJC) codes

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