INVESTIGATION OF STRESS EFFECTS ON THE DC CHARACTERISTICS OF GAAS MESFET'S THROUGH THE USE OF EXTERNALLY APPLIED LOADS.

The authors assess the impact of process induced stresses on the fabrication and performance of GaAs MESFETs. Stress was introduced into the devices directly by bonding chips to mechanical test specimens, thus avoiding any additional thermal or plasma processing in the determination of the mechanical effects, and allowing the study of individual devices in both tension and compression. Threshold shifts were measured on 1- mu m self-aligned refractory gate MESFETs (having no direction overlayer) which were stressed in this way. Close agreement was found with the predictions of piezoelectrically induced threshold shift. It was also observed that the threshold voltages of devices oriented with their current flow along several directions behave opposite in sign and very nearly equal in magnitude for tension and compression. In addition to measuring threshold shifts, effects of stress of a wide range of dc parameters were monitored. Nomonotonic yet systematic variations in these other dc parameters suggests the possibility of plastic deformation (i. e. , defection generation) in the device structures even at relatively low bulk stresses ( less than 200 psi), presumably due to the very large stress concentration.