Iterative built-in testing and tuning of mixed-signal/RF systems

A. Chatterjee, D. Han, V. Natarajan, S. Devarakond, S. Sen, H. Choi, R. Senguttuvan, S. Bhattacharya, A. Goyal, D. Lee, M. Swaminathan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Scopus citations

Abstract

Design and test of high-speed mixedsignal/RF circuits and systems is undergoing a transformation due to the effects of process variations stemming from the use of scaled CMOS technologies that result in significant yield loss. To this effect, postmanufacture tuning for yield recovery is now a necessity for many high-speed electronic circuits and systems and is typically driven by iterative test-and-tune procedures. Such procedures create new challenges for manufacturing test and built-in self-test of advanced mixed-signal/RF systems. In this paper, key test challenges are discussed and promising solutions are presented in the hope that it will be possible to design, manufacture and test "truly self-healing" systems in the near future.

Original languageEnglish (US)
Title of host publication2009 IEEE International Conference on Computer Design, ICCD 2009
Pages319-326
Number of pages8
DOIs
StatePublished - 2009
Event2009 IEEE International Conference on Computer Design, ICCD 2009 - Lake Tahoe, CA, United States
Duration: Oct 4 2009Oct 7 2009

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)1063-6404

Other

Other2009 IEEE International Conference on Computer Design, ICCD 2009
Country/TerritoryUnited States
CityLake Tahoe, CA
Period10/4/0910/7/09

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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