Language-level persistency

Aasheesh Kolli, Vaibhav Gogte, Ali Saidi, Stephan Diestelhorst, Peter M. Chen, Satish Narayanasamy, Thomas F. Wenisch

Research output: Chapter in Book/Report/Conference proceedingConference contribution

71 Scopus citations


The commercial release of byte-addressable persistent memories, such as Intel/Micron 3D XPoint memory, is imminent. Ongoing research has sought mechanisms to allow programmers to implement recoverable data structures in these new main memories. Ensuring recoverability requires programmer control of the order of persistent stores; recent work proposes persistency models as an extension to memory consistency to specify such ordering. Prior work has considered persistency models at the abstraction of the instruction set architecture. Instead, we argue for extending the language-level memory model to provide guarantees on the order of persistent writes. We explore a taxonomy of guarantees a language-level persistency model might provide, considering both atomicity and ordering constraints on groups of persistent stores. Then, we propose and evaluate Acquire-Release Persistency (ARP), a language-level persistency model for C++11. We describe how to compile code written for ARP to a state-of-the-art ISA-level persistency model. We then consider enhancements to the ISA-level persistency model that can distinguish memory consistency constraints required for proper synchronization but unnecessary for correct recovery. With these optimizations, we show that ARP increases performance by up to 33.2% (19.8% avg.) over coding directly to the baseline ISA-level persistency model for a suite of persistent-write-intensive workloads.

Original languageEnglish (US)
Title of host publicationISCA 2017 - 44th Annual International Symposium on Computer Architecture - Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages13
ISBN (Electronic)9781450348928
StatePublished - Jun 24 2017
Event44th Annual International Symposium on Computer Architecture - ISCA 2017 - Toronto, Canada
Duration: Jun 24 2017Jun 28 2017

Publication series

NameProceedings - International Symposium on Computer Architecture
VolumePart F128643
ISSN (Print)1063-6897


Conference44th Annual International Symposium on Computer Architecture - ISCA 2017

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture


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