Field-programmable gate arrays (FPGAs) have become very popular in recent times. With their regular structures, they are particularly amenable to scaling to smaller technologies. They form an excellent platform for studying emerging technologies. Recently, there have been significant advances in nanoelectronics fabrication that make them a viable alternative to CMOS. One such promising alternative is bundles of single-walled carbon nanotube (SWCNT). In this chapter, we explore several different architectural options for implementing the routing fabric of future FPGA devices. First, we present the benefits obtained from directly replacing the copper interconnect wires by SWCNT bundle interconnect. The architectural parameters are tuned to leverage this new interconnect. Second, the routing fabric is completely redesigned to use nanowires arranged in a crossbar with molecular switches placed at their junctions to provide programmability. A thorough evaluation of this architecture considering various wire parameters is conducted and compared to the traditional SRAM-based FPGA. The chapter presents attractive area-delay product advantages, thus setting the motivation for using these emerging technologies in the FPGA domain. Most of these benefits are due to the area reduction that nanoscale technologies can provide (nearly 100× smaller area). On average for MCNC benchmarks, a critical path delay benefit of 21% was observed when SWCNT nanowire crossbar and molecular switches were used (SWCNT-Arch1) over the traditional buffered-switch SRAM FPGA architecture.
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