Low-power approximate convolution computing unit with domain-wall motion based "spin-memristor" for image processing applications

Yong Shim, Abhronil Sengupta, Kaushik Roy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Scopus citations

Abstract

Convolution serves as the basic computational primitive for various associative computing tasks ranging from edge detection to image matching. CMOS implementation of such computations entails significant bottlenecks in area and energy consumption due to the large number of multiplication and addition operations involved. In this paper, we propose an ultra-low power and compact hybrid spintronic-CMOS design for the convolution computing unit. Low-voltage operation of domain-wall motion based magneto-metallic "Spin-Memristor"s interfaced with CMOS circuits is able to perform the convolution operation with reasonable accuracy. Simulation results of Gabor filtering for edge detection reveal ∼ 2.5× lower energy consumption compared to a baseline 45nm-CMOS implementation.

Original languageEnglish (US)
Title of host publicationProceedings of the 53rd Annual Design Automation Conference, DAC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450342360
DOIs
StatePublished - Jun 5 2016
Event53rd Annual ACM IEEE Design Automation Conference, DAC 2016 - Austin, United States
Duration: Jun 5 2016Jun 9 2016

Publication series

NameProceedings - Design Automation Conference
Volume05-09-June-2016
ISSN (Print)0738-100X

Other

Other53rd Annual ACM IEEE Design Automation Conference, DAC 2016
Country/TerritoryUnited States
CityAustin
Period6/5/166/9/16

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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