Abstract
In this paper, we present extensive simulation results for different types of parallel adders, which are the most frequently used primitives in digital signal processing. The adders studied include the linear time ripple carry and Manchester carry chain adders, the logarithmic carry lookahead adders and its variations, the carry skip adder, and the constant time signed-digit adders.
| Original language | English (US) |
|---|---|
| Pages | 276-285 |
| Number of pages | 10 |
| State | Published - 1994 |
| Event | Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing - La Jolla, CA, USA Duration: Oct 26 1994 → Oct 28 1994 |
Other
| Other | Proceedings of the 1994 IEEE International Workshop VLSI Signal Processing |
|---|---|
| City | La Jolla, CA, USA |
| Period | 10/26/94 → 10/28/94 |
All Science Journal Classification (ASJC) codes
- Signal Processing
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