Abstract
As scaling becomes increasingly difficult, there is growing interest in vertical or three-dimensional stacking of transistors and especially memory. Ferroelectric semiconductor field effect transistors can be key enablers to improve energy efficiency and overall chip and memory performance. In this work, low-temperature processed, back-end-of-the-line compatible transistors were demonstrated by depositing a layered chalcogenide ferroelectric semiconductor, beta-phase In2Se3, at temperature as low as 400 °C. Top gate n-channel In2Se3 thin film transistors were fabricated with field-effect mobility ∼1 cm2 V-1 s-1, and simple polarization switching based memory results are presented.
| Original language | English (US) |
|---|---|
| Article number | 025023 |
| Journal | 2D Materials |
| Volume | 9 |
| Issue number | 2 |
| DOIs | |
| State | Published - Apr 2022 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
All Science Journal Classification (ASJC) codes
- General Chemistry
- General Materials Science
- Condensed Matter Physics
- Mechanics of Materials
- Mechanical Engineering
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