Lowering Area Overheads for FeFET-Based Energy-Efficient Nonvolatile Flip-Flops

Xueqing Li; Sumitha George; Yuhua Liang; Kaisheng Ma; Kai Ni; Ahmedullah Aziz; Sumeet Kumar Gupta; John Sampson; Meng Fan Chang; Yongpan Liu; Huazhong Yang; Suman Datta; Vijaykrishnan Narayanan

doi:10.1109/TED.2018.2829348

Lowering Area Overheads for FeFET-Based Energy-Efficient Nonvolatile Flip-Flops

Xueqing Li, Sumitha George, Yuhua Liang, Kaisheng Ma, Kai Ni, Ahmedullah Aziz, Sumeet Kumar Gupta, John Sampson, Meng Fan Chang, Yongpan Liu, Huazhong Yang, Suman Datta, Vijaykrishnan Narayanan

Research output: Contribution to journal › Article › peer-review

24 Scopus citations

Abstract

This brief exploits the fusion of low-power logic and nonvolatile memory inside the emerging ferroelectric FETs (FeFETs) and proposes a new nonvolatile D flip-flop (nvDFF) through the device-circuit co-design. Compared with existing FeFET-based nvDFFs with on-demand control of backup and restore (BR), the area overhead is lowered by half, and the routing cost is reduced with embedded backup control into the supply voltage. Circuit simulations show below 5% energy-delay overhead in the normal mode and femtojoule BR energy. This new nvDFF promises area-and energy-efficient nonvolatile computing for power-gating and energy-harvesting applications.

Original language	English (US)
Pages (from-to)	2670-2674
Number of pages	5
Journal	IEEE Transactions on Electron Devices
Volume	65
Issue number	6
DOIs	https://doi.org/10.1109/TED.2018.2829348
State	Published - Jun 2018

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/TED.2018.2829348

Cite this

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title = "Lowering Area Overheads for FeFET-Based Energy-Efficient Nonvolatile Flip-Flops",

abstract = "This brief exploits the fusion of low-power logic and nonvolatile memory inside the emerging ferroelectric FETs (FeFETs) and proposes a new nonvolatile D flip-flop (nvDFF) through the device-circuit co-design. Compared with existing FeFET-based nvDFFs with on-demand control of backup and restore (BR), the area overhead is lowered by half, and the routing cost is reduced with embedded backup control into the supply voltage. Circuit simulations show below 5% energy-delay overhead in the normal mode and femtojoule BR energy. This new nvDFF promises area-and energy-efficient nonvolatile computing for power-gating and energy-harvesting applications.",

author = "Xueqing Li and Sumitha George and Yuhua Liang and Kaisheng Ma and Kai Ni and Ahmedullah Aziz and Gupta, {Sumeet Kumar} and John Sampson and Chang, {Meng Fan} and Yongpan Liu and Huazhong Yang and Suman Datta and Vijaykrishnan Narayanan",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.",

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month = jun,

doi = "10.1109/TED.2018.2829348",

language = "English (US)",

volume = "65",

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journal = "IEEE Transactions on Electron Devices",

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T1 - Lowering Area Overheads for FeFET-Based Energy-Efficient Nonvolatile Flip-Flops

AU - Li, Xueqing

AU - George, Sumitha

AU - Liang, Yuhua

AU - Ma, Kaisheng

AU - Ni, Kai

AU - Aziz, Ahmedullah

AU - Gupta, Sumeet Kumar

AU - Sampson, John

AU - Chang, Meng Fan

AU - Liu, Yongpan

AU - Yang, Huazhong

AU - Datta, Suman

AU - Narayanan, Vijaykrishnan

PY - 2018/6

Y1 - 2018/6

N2 - This brief exploits the fusion of low-power logic and nonvolatile memory inside the emerging ferroelectric FETs (FeFETs) and proposes a new nonvolatile D flip-flop (nvDFF) through the device-circuit co-design. Compared with existing FeFET-based nvDFFs with on-demand control of backup and restore (BR), the area overhead is lowered by half, and the routing cost is reduced with embedded backup control into the supply voltage. Circuit simulations show below 5% energy-delay overhead in the normal mode and femtojoule BR energy. This new nvDFF promises area-and energy-efficient nonvolatile computing for power-gating and energy-harvesting applications.

AB - This brief exploits the fusion of low-power logic and nonvolatile memory inside the emerging ferroelectric FETs (FeFETs) and proposes a new nonvolatile D flip-flop (nvDFF) through the device-circuit co-design. Compared with existing FeFET-based nvDFFs with on-demand control of backup and restore (BR), the area overhead is lowered by half, and the routing cost is reduced with embedded backup control into the supply voltage. Circuit simulations show below 5% energy-delay overhead in the normal mode and femtojoule BR energy. This new nvDFF promises area-and energy-efficient nonvolatile computing for power-gating and energy-harvesting applications.

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IS - 6

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Lowering Area Overheads for FeFET-Based Energy-Efficient Nonvolatile Flip-Flops

Abstract

All Science Journal Classification (ASJC) codes

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