TY - JOUR
T1 - Magnetic Skyrmion as a Spintronic Deep Learning Spiking Neuron Processor
AU - Chen, Mei Chin
AU - Sengupta, Abhronil
AU - Roy, Kaushik
N1 - Publisher Copyright:
© 1965-2012 IEEE.
PY - 2018/8
Y1 - 2018/8
N2 - Deep spiking neural networks (SNNs) have emerged as one of the popular architectures in complex pattern recognition and classification tasks that can be enabled by low-power neuromorphic hardware. However, hardware implementation of such algorithms using conventional CMOS devices is area expensive and energy inefficient. This is owing to the fundamental mismatch between the underlying neuromophic computations and the CMOS transistors along with energy consumption involved in synaptic memory-access operations. Hence, there is a need for novel 'neuro-mimetic' devices offering a direct mapping to synaptic and neuronal functionalities together with the possibility of providing in situ synaptic storage. Magnetic skyrmions have recently been proposed as a promising alternative for next-generation information carrier due to remarkably high stability, ultra-low depinning current density, and extremely compact size. In this paper, the design of skyrmion-based devices to emulate biological synapses and neurons is explored, and skyrmionic synapse-based crossbar architectures driving skyrmionic neurons are proposed. We perform a systematic device-circuit-architecture co-design for digit recognition with the MNIST handwritten digits dataset to evaluate the feasibility of our proposal. The device-to-system simulations indicate that the proposed skyrmion-based devices in deep SNNs can potentially achieve two orders of magnitude improvement in energy consumption over an optimized CMOS implementation at a 45 nm technology node.
AB - Deep spiking neural networks (SNNs) have emerged as one of the popular architectures in complex pattern recognition and classification tasks that can be enabled by low-power neuromorphic hardware. However, hardware implementation of such algorithms using conventional CMOS devices is area expensive and energy inefficient. This is owing to the fundamental mismatch between the underlying neuromophic computations and the CMOS transistors along with energy consumption involved in synaptic memory-access operations. Hence, there is a need for novel 'neuro-mimetic' devices offering a direct mapping to synaptic and neuronal functionalities together with the possibility of providing in situ synaptic storage. Magnetic skyrmions have recently been proposed as a promising alternative for next-generation information carrier due to remarkably high stability, ultra-low depinning current density, and extremely compact size. In this paper, the design of skyrmion-based devices to emulate biological synapses and neurons is explored, and skyrmionic synapse-based crossbar architectures driving skyrmionic neurons are proposed. We perform a systematic device-circuit-architecture co-design for digit recognition with the MNIST handwritten digits dataset to evaluate the feasibility of our proposal. The device-to-system simulations indicate that the proposed skyrmion-based devices in deep SNNs can potentially achieve two orders of magnitude improvement in energy consumption over an optimized CMOS implementation at a 45 nm technology node.
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U2 - 10.1109/TMAG.2018.2845890
DO - 10.1109/TMAG.2018.2845890
M3 - Article
AN - SCOPUS:85049136902
SN - 0018-9464
VL - 54
JO - IEEE Transactions on Magnetics
JF - IEEE Transactions on Magnetics
IS - 8
M1 - 1500207
ER -