Measurement-based modeling and test methodology for integrated substrates

W. Kim, S. Min, S. Choi, M. Swaminathan

Research output: Chapter in Book/Report/Conference proceedingConference contribution


A methodology for simulating high-speed integrated substrates in the time domain using Network Analyzer (NA) and Time Domain Reflectometry (TDR) measurements is discussed. For accurate simulation, transmission lines with distributed effects such as delay were simulated separately using nonphysical RLGC models and W-element (Hspice). For importing measured data into circuit simulators, a rational function approximation satisfying stability and passivity conditions have been developed. Simulation of a chip-to-chip interconnection is presented to demonstrate the validity of the methodology.

Original languageEnglish (US)
Title of host publication60th ARFTG Conference Digest
Subtitle of host publicationMeasurements Needs for Emerging Technologies, ARFTG 2002
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages10
ISBN (Electronic)0780381246, 9780780381247
StatePublished - 2002
Event60th ARFTG Conference Digest, ARFTG 2002 - Washington, United States
Duration: Dec 5 2002Dec 6 2002

Publication series

Name60th ARFTG Conference Digest: Measurements Needs for Emerging Technologies, ARFTG 2002


Conference60th ARFTG Conference Digest, ARFTG 2002
Country/TerritoryUnited States

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


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