@inproceedings{dac3b9b393954284b18010b734e5c3f6,
title = "Measurement-based modeling and test methodology for integrated substrates",
abstract = "A methodology for simulating high-speed integrated substrates in the time domain using Network Analyzer (NA) and Time Domain Reflectometry (TDR) measurements is discussed. For accurate simulation, transmission lines with distributed effects such as delay were simulated separately using nonphysical RLGC models and W-element (Hspice). For importing measured data into circuit simulators, a rational function approximation satisfying stability and passivity conditions have been developed. Simulation of a chip-to-chip interconnection is presented to demonstrate the validity of the methodology.",
author = "W. Kim and S. Min and S. Choi and M. Swaminathan",
note = "Publisher Copyright: {\textcopyright} 2002 IEEE.; 60th ARFTG Conference Digest, ARFTG 2002 ; Conference date: 05-12-2002 Through 06-12-2002",
year = "2002",
doi = "10.1109/ARFTGF.2002.1218683",
language = "English (US)",
series = "60th ARFTG Conference Digest: Measurements Needs for Emerging Technologies, ARFTG 2002",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "29--38",
booktitle = "60th ARFTG Conference Digest",
address = "United States",
}