TY - GEN
T1 - Methods for Booting an All Programmable System-on-Chip over PCl Express Link
AU - Sarmah, Mrinal J.
AU - Saikrishna, Bokka Abhiram
AU - Kumar, Anil
AU - Vikramasimhan, Kamalesh
AU - Azeemuddin, Syed
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2018/11/5
Y1 - 2018/11/5
N2 - An All Programmable System-on-Chip (SoC) solution consisting of a hardened processor and a programmable fabric solution has been identified as a growing heterogeneous programmable platform catering to variety of application areas including communication, remote radio head, and software-defined radio and so on. The process to boot such a SoC with embedded processor and programmable fabric has been a challenge considering the complexity involved in multiple stages of booting. The boot sequence typically involves loading of first stage loader, configuring the programmable fabric with configuration bitstream followed by loading of user boot loader. Booting with typical boot devices like Quad Serial Peripheral Interface (QSPI), NAND or NOR flash results in increased boot time. The embedded PCI Express block in such SoC can be used as a carrier for the boot image including the user boot loader and the bitstream. The boot loader can be transferred from a remote host PC to the SoC's on chip memory over PCle link. Such boot process imparts significant improvement in boot time and ensures boot image security since the boot images can be stored in a secure processing system. Using boot over PCIe methodology, the authors have experimentally found 20x improvement in boot time over the state-of-the-art boot mechanisms.
AB - An All Programmable System-on-Chip (SoC) solution consisting of a hardened processor and a programmable fabric solution has been identified as a growing heterogeneous programmable platform catering to variety of application areas including communication, remote radio head, and software-defined radio and so on. The process to boot such a SoC with embedded processor and programmable fabric has been a challenge considering the complexity involved in multiple stages of booting. The boot sequence typically involves loading of first stage loader, configuring the programmable fabric with configuration bitstream followed by loading of user boot loader. Booting with typical boot devices like Quad Serial Peripheral Interface (QSPI), NAND or NOR flash results in increased boot time. The embedded PCI Express block in such SoC can be used as a carrier for the boot image including the user boot loader and the bitstream. The boot loader can be transferred from a remote host PC to the SoC's on chip memory over PCle link. Such boot process imparts significant improvement in boot time and ensures boot image security since the boot images can be stored in a secure processing system. Using boot over PCIe methodology, the authors have experimentally found 20x improvement in boot time over the state-of-the-art boot mechanisms.
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U2 - 10.1109/ICCIC.2017.8524555
DO - 10.1109/ICCIC.2017.8524555
M3 - Conference contribution
AN - SCOPUS:85057950085
T3 - 2017 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017
BT - 2017 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017
A2 - Krishnan, N.
A2 - Karthikeyan, M.
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 8th IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017
Y2 - 14 December 2017 through 16 December 2017
ER -