Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options

Jinwoo Kim; Lingjun Zhu; Hakki Mert Torun; Madhavan Swaminathan; Sung Kyu Lim

doi:10.1109/DAC18074.2021.9586229

Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options

Jinwoo Kim, Lingjun Zhu, Hakki Mert Torun, Madhavan Swaminathan, Sung Kyu Lim

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Scopus citations

Abstract

In this paper, we present three commercial-grade 3D IC designs based on state-of-the-art design technologies, specifically micro-bumping (3D die stacking), hybrid bonding (wafer-on-wafer bonding) and monolithic 3D IC (M3D). To highlight trade-offs present in these three designs, we perform analyses on power, performance, and area and the clock tree. We also model the tier-to-tier interconnection in each 3D IC methodology and analyze signal integrity to assess the reliability of each design. From our experiments, hybrid bonding design shows the best timing improvement of 81.4% when compared to its 2D counterpart, while micro-bumping shows the best reliability among 3D IC designs.

Original language	English (US)
Title of host publication	2021 58th ACM/IEEE Design Automation Conference, DAC 2021
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1189-1194
Number of pages	6
ISBN (Electronic)	9781665432740
DOIs	https://doi.org/10.1109/DAC18074.2021.9586229
State	Published - Dec 5 2021
Event	58th ACM/IEEE Design Automation Conference, DAC 2021 - San Francisco, United States Duration: Dec 5 2021 → Dec 9 2021

Publication series

Name	Proceedings - Design Automation Conference
Volume	2021-December
ISSN (Print)	0738-100X

Conference

Conference	58th ACM/IEEE Design Automation Conference, DAC 2021
Country/Territory	United States
City	San Francisco
Period	12/5/21 → 12/9/21

All Science Journal Classification (ASJC) codes

Computer Science Applications
Control and Systems Engineering
Electrical and Electronic Engineering
Modeling and Simulation

Access to Document

10.1109/DAC18074.2021.9586229

Cite this

Kim, J., Zhu, L., Torun, H. M., Swaminathan, M., & Lim, S. K. (2021). Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options. In 2021 58th ACM/IEEE Design Automation Conference, DAC 2021 (pp. 1189-1194). (Proceedings - Design Automation Conference; Vol. 2021-December). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DAC18074.2021.9586229

@inproceedings{a784d9e176234037b3bbc7916457784d,

title = "Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options",

abstract = "In this paper, we present three commercial-grade 3D IC designs based on state-of-the-art design technologies, specifically micro-bumping (3D die stacking), hybrid bonding (wafer-on-wafer bonding) and monolithic 3D IC (M3D). To highlight trade-offs present in these three designs, we perform analyses on power, performance, and area and the clock tree. We also model the tier-to-tier interconnection in each 3D IC methodology and analyze signal integrity to assess the reliability of each design. From our experiments, hybrid bonding design shows the best timing improvement of 81.4% when compared to its 2D counterpart, while micro-bumping shows the best reliability among 3D IC designs.",

author = "Jinwoo Kim and Lingjun Zhu and Torun, {Hakki Mert} and Madhavan Swaminathan and Lim, {Sung Kyu}",

note = "Publisher Copyright: {\textcopyright} 2021 IEEE.; 58th ACM/IEEE Design Automation Conference, DAC 2021 ; Conference date: 05-12-2021 Through 09-12-2021",

year = "2021",

month = dec,

day = "5",

doi = "10.1109/DAC18074.2021.9586229",

language = "English (US)",

series = "Proceedings - Design Automation Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1189--1194",

booktitle = "2021 58th ACM/IEEE Design Automation Conference, DAC 2021",

address = "United States",

}

Kim, J, Zhu, L, Torun, HM, Swaminathan, M & Lim, SK 2021, Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options. in 2021 58th ACM/IEEE Design Automation Conference, DAC 2021. Proceedings - Design Automation Conference, vol. 2021-December, Institute of Electrical and Electronics Engineers Inc., pp. 1189-1194, 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, United States, 12/5/21. https://doi.org/10.1109/DAC18074.2021.9586229

Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options. / Kim, Jinwoo; Zhu, Lingjun; Torun, Hakki Mert et al.
2021 58th ACM/IEEE Design Automation Conference, DAC 2021. Institute of Electrical and Electronics Engineers Inc., 2021. p. 1189-1194 (Proceedings - Design Automation Conference; Vol. 2021-December).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options

AU - Kim, Jinwoo

AU - Zhu, Lingjun

AU - Torun, Hakki Mert

AU - Swaminathan, Madhavan

AU - Lim, Sung Kyu

PY - 2021/12/5

Y1 - 2021/12/5

N2 - In this paper, we present three commercial-grade 3D IC designs based on state-of-the-art design technologies, specifically micro-bumping (3D die stacking), hybrid bonding (wafer-on-wafer bonding) and monolithic 3D IC (M3D). To highlight trade-offs present in these three designs, we perform analyses on power, performance, and area and the clock tree. We also model the tier-to-tier interconnection in each 3D IC methodology and analyze signal integrity to assess the reliability of each design. From our experiments, hybrid bonding design shows the best timing improvement of 81.4% when compared to its 2D counterpart, while micro-bumping shows the best reliability among 3D IC designs.

AB - In this paper, we present three commercial-grade 3D IC designs based on state-of-the-art design technologies, specifically micro-bumping (3D die stacking), hybrid bonding (wafer-on-wafer bonding) and monolithic 3D IC (M3D). To highlight trade-offs present in these three designs, we perform analyses on power, performance, and area and the clock tree. We also model the tier-to-tier interconnection in each 3D IC methodology and analyze signal integrity to assess the reliability of each design. From our experiments, hybrid bonding design shows the best timing improvement of 81.4% when compared to its 2D counterpart, while micro-bumping shows the best reliability among 3D IC designs.

UR - http://www.scopus.com/inward/record.url?scp=85119411025&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85119411025&partnerID=8YFLogxK

U2 - 10.1109/DAC18074.2021.9586229

DO - 10.1109/DAC18074.2021.9586229

M3 - Conference contribution

AN - SCOPUS:85119411025

T3 - Proceedings - Design Automation Conference

SP - 1189

EP - 1194

BT - 2021 58th ACM/IEEE Design Automation Conference, DAC 2021

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 58th ACM/IEEE Design Automation Conference, DAC 2021

Y2 - 5 December 2021 through 9 December 2021

ER -

Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options

Abstract

Publication series

Conference

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this