TY - GEN
T1 - Mini-computer PDP-8 ISA simulator design and verification
AU - Elarabi, Tarek
AU - Kumar, Ranjith
AU - Basavaraj, Rajath Mavathur
PY - 2018/12/24
Y1 - 2018/12/24
N2 - This paper introduces a simple instruction set architecture simulator for the PDP-8 mini-computer. It generates a memory trace file from an assembled input object file. The memory trace file indicates whether the access was an instruction fetch, data read or data write. The simulator supports all instructions except for input/output and group 3 microinstructions. A summary of the total number of instructions executed, clock cycles consumed and instruction count by mnemonic is outputted at the end of simulation. A branch trace file is generated listing instruction branches by program counter, branch type, target address and whether taken or not.
AB - This paper introduces a simple instruction set architecture simulator for the PDP-8 mini-computer. It generates a memory trace file from an assembled input object file. The memory trace file indicates whether the access was an instruction fetch, data read or data write. The simulator supports all instructions except for input/output and group 3 microinstructions. A summary of the total number of instructions executed, clock cycles consumed and instruction count by mnemonic is outputted at the end of simulation. A branch trace file is generated listing instruction branches by program counter, branch type, target address and whether taken or not.
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U2 - 10.1109/UKSim.2018.00042
DO - 10.1109/UKSim.2018.00042
M3 - Conference contribution
AN - SCOPUS:85061039679
T3 - Proceedings - 2018 UKSim-AMSS 20th International Conference on Modelling and Simulation, UKSim 2018
SP - 175
EP - 180
BT - Proceedings - 2018 UKSim-AMSS 20th International Conference on Modelling and Simulation, UKSim 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 20th IEEE UKSim-AMSS International Conference on Modelling and Simulation, UKSim 2018
Y2 - 27 March 2018 through 29 March 2018
ER -