TY - GEN
T1 - Minimizing Coherence Errors via Dynamic Decoupling
AU - Khadirsharbiyani, Soheil
AU - Sadeghi, Movahhed
AU - Eghbali Zarch, Mostafa
AU - Kandemir, Mahmut Taylan
N1 - Publisher Copyright:
© 2024 ACM.
PY - 2024/5/30
Y1 - 2024/5/30
N2 - Quantum computing in the Noisy Intermediate-Scale Quantum (NISQ) era faces significant challenges due to the limitations in quantum gate fidelity and elevated error rates, which impede the successful execution of large-scale quantum circuits. One major source of errors in quantum computing is 'coherence errors', which arise from the idle time during circuit execution. Specifically, factors such as uneven gate operations, hardware limitations, and qubit connectivity constraints collectively contribute to the formation of 'holes' in quantum circuits, leading to 'idle qubits'. These idle periods, in turn, increase noise and error rates, thus negatively impacting the overall reliability of quantum circuits' outputs. 'Dynamic Decoupling' involves implementing a series of single-qubit gates during the idle periods of each qubit, with the goal of minimizing coherence errors while incurring (less impactful) gate errors. Unlike previous approaches that require executing multiple circuit versions to achieve optimal dynamic decoupling, we present, in this work, an innovative method that characterizes the system just 'once' and enhances circuit performance based on this single characterization. This study introduces a practical technique for minimizing coherence errors by employing dynamic decoupling (using an X-Y-X-Y gate sequence) based on the slack lengths of the quantum circuit holes. More specifically, our approach focuses on optimizing idle qubits and precisely calculating the duration of these idle periods (referred to as 'slacks') for a more efficient application of dynamic decoupling. Our proposed method results in PST (probability of successful trial) improvements of 1.15x for small-scale benchmarks, 1.1x for medium-scale benchmarks, and 1.2x for large-scale benchmarks, when applied to the Qiskit and QASM benchmarks (a quantum benchmark suite for NISQ machines), in comparison to a state-of-the-art technique, while requiring 89% fewer characterization experiments. Compared to no dynamic decoupling and existing dynamic decoupling-based baselines, our approach achieves 1.6x and 1.4x better PST, respectively, on average.
AB - Quantum computing in the Noisy Intermediate-Scale Quantum (NISQ) era faces significant challenges due to the limitations in quantum gate fidelity and elevated error rates, which impede the successful execution of large-scale quantum circuits. One major source of errors in quantum computing is 'coherence errors', which arise from the idle time during circuit execution. Specifically, factors such as uneven gate operations, hardware limitations, and qubit connectivity constraints collectively contribute to the formation of 'holes' in quantum circuits, leading to 'idle qubits'. These idle periods, in turn, increase noise and error rates, thus negatively impacting the overall reliability of quantum circuits' outputs. 'Dynamic Decoupling' involves implementing a series of single-qubit gates during the idle periods of each qubit, with the goal of minimizing coherence errors while incurring (less impactful) gate errors. Unlike previous approaches that require executing multiple circuit versions to achieve optimal dynamic decoupling, we present, in this work, an innovative method that characterizes the system just 'once' and enhances circuit performance based on this single characterization. This study introduces a practical technique for minimizing coherence errors by employing dynamic decoupling (using an X-Y-X-Y gate sequence) based on the slack lengths of the quantum circuit holes. More specifically, our approach focuses on optimizing idle qubits and precisely calculating the duration of these idle periods (referred to as 'slacks') for a more efficient application of dynamic decoupling. Our proposed method results in PST (probability of successful trial) improvements of 1.15x for small-scale benchmarks, 1.1x for medium-scale benchmarks, and 1.2x for large-scale benchmarks, when applied to the Qiskit and QASM benchmarks (a quantum benchmark suite for NISQ machines), in comparison to a state-of-the-art technique, while requiring 89% fewer characterization experiments. Compared to no dynamic decoupling and existing dynamic decoupling-based baselines, our approach achieves 1.6x and 1.4x better PST, respectively, on average.
UR - http://www.scopus.com/inward/record.url?scp=85196314198&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85196314198&partnerID=8YFLogxK
U2 - 10.1145/3650200.3656617
DO - 10.1145/3650200.3656617
M3 - Conference contribution
AN - SCOPUS:85196314198
T3 - Proceedings of the International Conference on Supercomputing
SP - 165
EP - 174
BT - ICS 2024 - Proceedings of the 38th ACM International Conference on Supercomputing
PB - Association for Computing Machinery
T2 - 38th ACM International Conference on Supercomputing, ICS 2024
Y2 - 4 June 2024 through 7 June 2024
ER -