TY - GEN
T1 - Minimizing simultaneous switching noise at reduced power with constant-voltage power transmission lines for high-speed signaling
AU - Telikepalli, Satyanarayana
AU - Swaminathan, Madhavan
AU - Keezer, David
PY - 2013
Y1 - 2013
N2 - Signal and power integrity are crucial for ensuring high performance in high speed digital systems. As the operating frequency of digital systems increases, the power and ground bounce created by simultaneous switching noise (SSN) has become a limiting factor for the performance of these devices. SSN is caused by parasitic inductance that exists in the power delivery network (PDN), and voltage fluctuations on the power and ground rails can lead to reduced noise margins and can limit the maximum frequency of a digital device. A new PDN design has been suggested that achieves significantly reduced SSN [1] by replacing the power plane structure with a power transmission line (PTL). In this paper, a new power delivery scheme called Constant Voltage Power Transmission Line (CV-PTL) is shown to significantly reduce switching noise while also lowering power consumption. This concept has been demonstrated through theory, simulation, and measurements.
AB - Signal and power integrity are crucial for ensuring high performance in high speed digital systems. As the operating frequency of digital systems increases, the power and ground bounce created by simultaneous switching noise (SSN) has become a limiting factor for the performance of these devices. SSN is caused by parasitic inductance that exists in the power delivery network (PDN), and voltage fluctuations on the power and ground rails can lead to reduced noise margins and can limit the maximum frequency of a digital device. A new PDN design has been suggested that achieves significantly reduced SSN [1] by replacing the power plane structure with a power transmission line (PTL). In this paper, a new power delivery scheme called Constant Voltage Power Transmission Line (CV-PTL) is shown to significantly reduce switching noise while also lowering power consumption. This concept has been demonstrated through theory, simulation, and measurements.
UR - https://www.scopus.com/pages/publications/84879591206
UR - https://www.scopus.com/pages/publications/84879591206#tab=citedBy
U2 - 10.1109/ISQED.2013.6523689
DO - 10.1109/ISQED.2013.6523689
M3 - Conference contribution
AN - SCOPUS:84879591206
SN - 9781467349536
T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED
SP - 714
EP - 718
BT - Proceedings of the 14th International Symposium on Quality Electronic Design, ISQED 2013
T2 - 14th International Symposium on Quality Electronic Design, ISQED 2013
Y2 - 4 March 2013 through 6 March 2013
ER -