Minimizing simultaneous switching noise at reduced power with power transmission lines for high-speed signaling

Satyanarayana Telikepalli, Madhavan Swaminathan, David Keezer

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Signal and power integrity are crucial for ensuring high performance in high speed digital systems. As the operating frequency of digital systems increases, the power and ground bounce created by simultaneous switching noise (SSN) has become a limiting factor for the performance of these devices. SSN is caused by parasitic inductance that exists in the power delivery network (PDN), and voltage fluctuations on the power and ground rails can lead to reduced noise margins and can limit the maximum frequency of a digital device. A new PDN design has been suggested that achieves significantly reduced SSN [1] by replacing the power plane structure with a power transmission line (PTL). In this paper, a new power delivery scheme is shown to significantly reduce switching noise at lower power. This concept has been demonstrated through theory, simulation, and measurements.

Original languageEnglish (US)
Title of host publication2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012
Pages29-32
Number of pages4
DOIs
StatePublished - 2012
Event2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012 - Tempe, AZ, United States
Duration: Oct 21 2012Oct 24 2012

Publication series

Name2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012

Conference

Conference2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012
Country/TerritoryUnited States
CityTempe, AZ
Period10/21/1210/24/12

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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