Minimizing the number of basis functions in chip-package co-simulation using lauerre-FDTD

Interaction between the chip and package at the system level needs to be predicted in the design process for saving time and cost, which requires chip-package co-simulation. Laguerre-FDTD is an unconditionally stable FDTD scheme which is attractive for chip-package co-simulation since its time-step is not limited by the Courant condition. In Laguerre-FDTD, the transient waveform of the field of interest is represented as the weighted sum of Laguerre basis functions. Therefore, the number of basis functions used in the simulation is directly related to both the simulation run time and the accuracy. Normally, there is a tradeoff between simulation run time and the accuracy. However, this paper proposes a novel solution to minimize the number of basis functions while increasing the accuracy of the output transient waveform of interest. The method for maximizing the efficiency in terms of run time and improving the accuracy of simulation described in this paper is a key step for the automation and practical use of the transient simulation technique using Laguerre polynomials.