TY - GEN
T1 - Mitigating electromigration of power supply networks using bidirectional current stress
AU - Xie, Jing
AU - Narayanan, Vijaykrishnan
AU - Xie, Yuan
PY - 2012
Y1 - 2012
N2 - Electromigration (EM) is one of the major reliability issues for IC designs. The EM effect is observed as the shape change of metal wires under uni-directional high density current. Such metal wire distortions could result in open-circuit failures or short-circuit failures for the interconnects in integrated circuits. The current density on power supply network is usually the highest one among all the on-chip interconnects, and the current direction on power rails seldom changes. Consequently, the power supply network is the most EM-vulnerable component on a chip. We propose a novel solution based on the electromigration AC healing effect to extend the lifetime of power supply networks. This solution uses simple control logics to apply balanced amount of current in both directions of power rails. Therefore, power wires can perform self-healing during function mode. This technique can be easily integrated into different package plans with small area and performance overhead. The post layout simulation shows 3X-10X increase of the mean time to failure (MTTF) for the power rails.
AB - Electromigration (EM) is one of the major reliability issues for IC designs. The EM effect is observed as the shape change of metal wires under uni-directional high density current. Such metal wire distortions could result in open-circuit failures or short-circuit failures for the interconnects in integrated circuits. The current density on power supply network is usually the highest one among all the on-chip interconnects, and the current direction on power rails seldom changes. Consequently, the power supply network is the most EM-vulnerable component on a chip. We propose a novel solution based on the electromigration AC healing effect to extend the lifetime of power supply networks. This solution uses simple control logics to apply balanced amount of current in both directions of power rails. Therefore, power wires can perform self-healing during function mode. This technique can be easily integrated into different package plans with small area and performance overhead. The post layout simulation shows 3X-10X increase of the mean time to failure (MTTF) for the power rails.
UR - http://www.scopus.com/inward/record.url?scp=84861181094&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84861181094&partnerID=8YFLogxK
U2 - 10.1145/2206781.2206854
DO - 10.1145/2206781.2206854
M3 - Conference contribution
AN - SCOPUS:84861181094
SN - 9781450312448
T3 - Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
SP - 299
EP - 302
BT - GLSVLSI'12 - Proceedings of the Great Lakes Symposium on VLSI 2012
T2 - 22nd Great Lakes Symposium on VLSI, GLSVLSI'2012
Y2 - 3 May 2012 through 4 May 2012
ER -