@inproceedings{e7eacc7b4b34438f9554d5d3692bcfe2,
title = "Modeling and analysis of domain wall dynamics for robust and low-power embedded memory",
abstract = "Non-volatile memories are gaining significant attention for embedded cache application due to low standby power and excellent retention. Domain wall memory (DWM) is one possible candidate due to its ability to store multiple bits/cell in order to break the density barrier. Additionally, it provides low standby power, fast access time, good endurance and good retention. In this paper, we provide a physics-based model of domain wall that comprehends process variations (PV) and Joule heating. The proposed model has been used for circuit simulation. We also propose techniques to mitigate the impact of variability and Joule heating while enabling low-power and high frequency operation.",
author = "Anirudh Iyengar and Swaroop Ghosh",
year = "2014",
doi = "10.1145/2593069.2593161",
language = "English (US)",
isbn = "9781479930173",
series = "Proceedings - Design Automation Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "DAC 2014 - 51st Design Automation Conference, Conference Proceedings",
address = "United States",
note = "51st Annual Design Automation Conference, DAC 2014 ; Conference date: 02-06-2014 Through 05-06-2014",
}