TY - JOUR
T1 - Multi-channel signal-generator ASIC for acoustic holograms
AU - Song, Rui
AU - Richard, Grace
AU - Cheng, Christopher You Yee
AU - Teng, Lijun
AU - Qiu, Yongqiang
AU - Lavery, Martin Philip John
AU - Trolier-Mckinstry, Susan
AU - Cochran, Sandy
AU - Underwood, Ian
N1 - Publisher Copyright:
© 1986-2012 IEEE.
PY - 2020/1
Y1 - 2020/1
N2 - A complementary metal-oxide-semiconductor (CMOS) application-specific integrated circuit (ASIC) has been developed to generate arbitrary, dynamic phase patterns for acoustic hologram applications. An experimental prototype has been fabricated to demonstrate phase shaping. It comprises a cascadable 1 × 9 array of identical, independently controlled signal generators implemented in a 0.35-μm minimum-feature-size process. It can individually control the phase of a square wave on each of the nine output pads. The footprint of the integrated circuit is 1175 × 88 μm2. A 128-MHz clock frequency is used to produce outputs at 8 MHz with a phase resolution of 16 levels (4 bits) per channel. A 6 × 6 air-coupled matrix array ultrasonic transducer was built and driven by four ASICs, with the help of commercial buffer amplifiers, for the application demonstration. Acoustic pressure mapping and particle manipulation were performed. In addition, a 2 × 2 array piezoelectric micromachined ultrasonic transducer (PMUT) was connected and driven by four output channels of a single ASIC, demonstrating the flexibility of the ASIC to work with different transducers and the potential for direct integration of CMOS and PMUTs.
AB - A complementary metal-oxide-semiconductor (CMOS) application-specific integrated circuit (ASIC) has been developed to generate arbitrary, dynamic phase patterns for acoustic hologram applications. An experimental prototype has been fabricated to demonstrate phase shaping. It comprises a cascadable 1 × 9 array of identical, independently controlled signal generators implemented in a 0.35-μm minimum-feature-size process. It can individually control the phase of a square wave on each of the nine output pads. The footprint of the integrated circuit is 1175 × 88 μm2. A 128-MHz clock frequency is used to produce outputs at 8 MHz with a phase resolution of 16 levels (4 bits) per channel. A 6 × 6 air-coupled matrix array ultrasonic transducer was built and driven by four ASICs, with the help of commercial buffer amplifiers, for the application demonstration. Acoustic pressure mapping and particle manipulation were performed. In addition, a 2 × 2 array piezoelectric micromachined ultrasonic transducer (PMUT) was connected and driven by four output channels of a single ASIC, demonstrating the flexibility of the ASIC to work with different transducers and the potential for direct integration of CMOS and PMUTs.
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U2 - 10.1109/TUFFC.2019.2938917
DO - 10.1109/TUFFC.2019.2938917
M3 - Article
C2 - 31484116
AN - SCOPUS:85077295806
SN - 0885-3010
VL - 67
SP - 49
EP - 56
JO - IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control
JF - IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control
IS - 1
M1 - 8822495
ER -