TY - GEN
T1 - Non-silicon logic elements on silicon for extreme voltage scaling
AU - Datta, S.
AU - Ali, A.
AU - Mookerjea, S.
AU - Saripalli, V.
AU - Liu, L.
AU - Eachempati, S.
AU - Mayer, T.
AU - Narayanan, V.
PY - 2010
Y1 - 2010
N2 - Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures - quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.
AB - Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures - quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.
UR - http://www.scopus.com/inward/record.url?scp=77958005084&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77958005084&partnerID=8YFLogxK
U2 - 10.1109/SNW.2010.5562592
DO - 10.1109/SNW.2010.5562592
M3 - Conference contribution
AN - SCOPUS:77958005084
SN - 9781424477272
T3 - 2010 Silicon Nanoelectronics Workshop, SNW 2010
BT - 2010 Silicon Nanoelectronics Workshop, SNW 2010
T2 - 2010 15th Silicon Nanoelectronics Workshop, SNW 2010
Y2 - 13 June 2010 through 14 June 2010
ER -
