Non-silicon logic elements on silicon for extreme voltage scaling

S. Datta; A. Ali; S. Mookerjea; V. Saripalli; L. Liu; S. Eachempati; T. Mayer; V. Narayanan

doi:10.1109/SNW.2010.5562592

Non-silicon logic elements on silicon for extreme voltage scaling

S. Datta
, A. Ali
, S. Mookerjea
, V. Saripalli
, L. Liu
, S. Eachempati
, T. Mayer
, V. Narayanan

Computer Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures - quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.

Original language	English (US)
Title of host publication	2010 Silicon Nanoelectronics Workshop, SNW 2010
DOIs	https://doi.org/10.1109/SNW.2010.5562592
State	Published - 2010
Event	2010 15th Silicon Nanoelectronics Workshop, SNW 2010 - Honolulu, HI, United States Duration: Jun 13 2010 → Jun 14 2010

Publication series

Name	2010 Silicon Nanoelectronics Workshop, SNW 2010

Other

Other	2010 15th Silicon Nanoelectronics Workshop, SNW 2010
Country/Territory	United States
City	Honolulu, HI
Period	6/13/10 → 6/14/10

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/SNW.2010.5562592

Cite this

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title = "Non-silicon logic elements on silicon for extreme voltage scaling",

abstract = "Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures - quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.",

author = "S. Datta and A. Ali and S. Mookerjea and V. Saripalli and L. Liu and S. Eachempati and T. Mayer and V. Narayanan",

year = "2010",

doi = "10.1109/SNW.2010.5562592",

language = "English (US)",

isbn = "9781424477272",

series = "2010 Silicon Nanoelectronics Workshop, SNW 2010",

booktitle = "2010 Silicon Nanoelectronics Workshop, SNW 2010",

note = "2010 15th Silicon Nanoelectronics Workshop, SNW 2010 ; Conference date: 13-06-2010 Through 14-06-2010",

}

Datta, S, Ali, A, Mookerjea, S, Saripalli, V, Liu, L, Eachempati, S, Mayer, T & Narayanan, V 2010, Non-silicon logic elements on silicon for extreme voltage scaling. in 2010 Silicon Nanoelectronics Workshop, SNW 2010., 5562592, 2010 Silicon Nanoelectronics Workshop, SNW 2010, 2010 15th Silicon Nanoelectronics Workshop, SNW 2010, Honolulu, HI, United States, 6/13/10. https://doi.org/10.1109/SNW.2010.5562592

TY - GEN

T1 - Non-silicon logic elements on silicon for extreme voltage scaling

AU - Datta, S.

AU - Ali, A.

AU - Mookerjea, S.

AU - Saripalli, V.

AU - Liu, L.

AU - Eachempati, S.

AU - Mayer, T.

AU - Narayanan, V.

PY - 2010

Y1 - 2010

N2 - Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures - quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.

AB - Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures - quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.

UR - https://www.scopus.com/pages/publications/77958005084

UR - https://www.scopus.com/pages/publications/77958005084#tab=citedBy

U2 - 10.1109/SNW.2010.5562592

DO - 10.1109/SNW.2010.5562592

M3 - Conference contribution

AN - SCOPUS:77958005084

SN - 9781424477272

T3 - 2010 Silicon Nanoelectronics Workshop, SNW 2010

BT - 2010 Silicon Nanoelectronics Workshop, SNW 2010

T2 - 2010 15th Silicon Nanoelectronics Workshop, SNW 2010

Y2 - 13 June 2010 through 14 June 2010

ER -

Non-silicon logic elements on silicon for extreme voltage scaling

Abstract

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UN SDGs

All Science Journal Classification (ASJC) codes

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