Abstract
In a network-on-chip based multicore, an off-chip data access needs to travel through the on-chip network, spending considerable amount of time within the chip (in addition to the memory access itself). Further, it also causes additional delays for on-chip accesses by creating contention on network resources. In this paper, we propose a compiler-guided off-chip data access localization strategy to ensure that, an off-chip access traverses a small number of links (hops) to reach the memory controller which governs the memory bank that holds the requested data. The results collected clearly emphasize the importance of localizing off-chip accesses.
Original language | English (US) |
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Pages (from-to) | 447-448 |
Number of pages | 2 |
Journal | Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT |
DOIs | |
State | Published - 2012 |
Event | 21st International Conference on Parallel Architectures and Compilation Techniques, PACT 2012 - Minneapolis, MN, United States Duration: Sep 19 2012 → Sep 23 2012 |
All Science Journal Classification (ASJC) codes
- Software
- Theoretical Computer Science
- Hardware and Architecture