TY - GEN
T1 - On-chip bus thermal analysis and optimization
AU - Wang, Feng
AU - Xie, Yuan
AU - Narayanan, Vijaykrishnan
AU - Irwin, Mary Jane
PY - 2006
Y1 - 2006
N2 - As technology scales, increasing clock rates, decreasing interconnect pitch, and the introduction of low-k dielectrics have made self-heating of the global interconnects an important issue in VLSI design. In this paper, we study the self-heating of on-chip buses and show that the thermal impact due to self-heating of onchip buses increases as technology scales, thus motivating the need of finding solutions to mitigate this effect. Based on the theoretical analysis, we propose an irredundant bus encoding scheme for on-chip buses to tackle the thermal issue. Simulation results show that our encoding scheme is very efficient to reduce the on-chip bus temperature rise over substrate temperature, with much less overhead compared to other low power encoding schemes.
AB - As technology scales, increasing clock rates, decreasing interconnect pitch, and the introduction of low-k dielectrics have made self-heating of the global interconnects an important issue in VLSI design. In this paper, we study the self-heating of on-chip buses and show that the thermal impact due to self-heating of onchip buses increases as technology scales, thus motivating the need of finding solutions to mitigate this effect. Based on the theoretical analysis, we propose an irredundant bus encoding scheme for on-chip buses to tackle the thermal issue. Simulation results show that our encoding scheme is very efficient to reduce the on-chip bus temperature rise over substrate temperature, with much less overhead compared to other low power encoding schemes.
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M3 - Conference contribution
AN - SCOPUS:34047138475
SN - 3981080114
SN - 9783981080117
T3 - Proceedings -Design, Automation and Test in Europe, DATE
BT - Proceedings - Design, Automation and Test in Europe, DATE'06
T2 - Design, Automation and Test in Europe, DATE'06
Y2 - 6 March 2006 through 10 March 2006
ER -