TY - JOUR
T1 - One-Shot Refresh
T2 - A Low-Power Low-Congestion Approach for Dynamic Memories
AU - Zhong, Hongtao
AU - Gu, Mingyang
AU - Wang, Yu
AU - Liu, Yongpan
AU - Narayanan, Vijaykrishnan
AU - Yang, Huazhong
AU - Li, Xueqing
N1 - Funding Information:
Manuscript received March 15, 2020; accepted April 7, 2020. Date of publication April 16, 2020; date of current version November 24, 2020. This work was supported in part by the National Key Research and Development Program of China under Grant 2018YFB2202800, in part by NSFC under Grant 61874066, Grant 61720106013, and Grant 61934005, and in part by ICFC and BNRist. This brief was recommended by Associate Editor J. H. Xie. (Hongtao Zhong and Mingyang Gu contributed equally to this work.) (Corresponding author: Xueqing Li.) Hongtao Zhong, Mingyang Gu, Yu Wang, Yongpan Liu, Huazhong Yang, and Xueqing Li are with the Electronic Engineering Department, Tsinghua University, Beijing 100084, China (e-mail: zhonght17@mails.tsinghua.edu.cn; gumy16@mails.tsinghua.edu.cn; yu-wang@tsinghua.edu.cn; ypliu@tsinghua.edu.cn; yanghz@tsinghua.edu.cn; xueqingli@tsinghua.edu.cn).
Publisher Copyright:
© 2004-2012 IEEE.
PY - 2020/12
Y1 - 2020/12
N2 - This brief presents the concept of one-shot refresh (OSR) for dynamic memories. The uniqueness of OSR that differs from the conventional row-by-row refresh operations, is that OSR is able to refresh all rows in the entire array by just one single refresh without the need to read out the stored data in each row. By doing so, significant energy savings could be achieved, and the time window accessible for regular read and write operations is widened with less disruption by the refresh traffic. We show that a few devices could be used to update existing designs to gain the OSR capability. These devices all exhibit hysteretic I-V characteristics and support the OSR data-independent refresh without the need to read out data first. The enabler is the proposed circuit technique for refresh and standby. As a proof of concept, we showcase an OSR-enabled embedded dynamic random-access memory (eDRAM) using the nano-electromechanical (NEM) relay, a type of CMOS-compatible device. Comparative evaluations show the merits of OSR more thoroughly.
AB - This brief presents the concept of one-shot refresh (OSR) for dynamic memories. The uniqueness of OSR that differs from the conventional row-by-row refresh operations, is that OSR is able to refresh all rows in the entire array by just one single refresh without the need to read out the stored data in each row. By doing so, significant energy savings could be achieved, and the time window accessible for regular read and write operations is widened with less disruption by the refresh traffic. We show that a few devices could be used to update existing designs to gain the OSR capability. These devices all exhibit hysteretic I-V characteristics and support the OSR data-independent refresh without the need to read out data first. The enabler is the proposed circuit technique for refresh and standby. As a proof of concept, we showcase an OSR-enabled embedded dynamic random-access memory (eDRAM) using the nano-electromechanical (NEM) relay, a type of CMOS-compatible device. Comparative evaluations show the merits of OSR more thoroughly.
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U2 - 10.1109/TCSII.2020.2988301
DO - 10.1109/TCSII.2020.2988301
M3 - Article
AN - SCOPUS:85097092213
SN - 1549-7747
VL - 67
SP - 3402
EP - 3406
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
IS - 12
M1 - 9069458
ER -