Optimizing array-intensive applications for on-chip multiprocessors

Keyphrases

• Chip multiprocessor 100%
• Optimization Strategy 100%
• Parallel Algorithm 100%
• On chip 100%
• Energy Conservation 66%
• Performance Constraints 66%
• Pre-activation 66%
• Nested Loops 66%
• Loop Nest 66%
• Loop Parallelization 66%
• Programmer 33%
• Energy Saving 33%
• First-in-class 33%
• Energy Consumption 33%
• Potential Energy Savings 33%
• Application Codes 33%
• Performance Loss 33%
• Execution Time 33%
• Sleep States 33%
• Energy Consumption Reduction 33%
• Performance Penalty 33%
• Parameter Optimization 33%
• Integer Linear Programming 33%
• Multiprocessor Architecture 33%
• Compilation Techniques 33%
• Code Optimization 33%

Computer Science

• Chip Multiprocessor 100%
• Intensive Application 100%
• Optimization Strategy 75%
• Parallelization 75%
• Energy Consumption 50%
• Nested Loop 50%
• Objective Function 25%
• Application Code 25%
• Execution Time 25%
• Performance Penalty 25%
• Integer-Linear Programming 25%
• Performance Loss 25%
• Code Optimization 25%
• Computer System Design 25%