TY - JOUR
T1 - Origin of the flatband-voltage roll-off phenomenon in metal/high-k gate stacks
AU - Bersuker, Gennadi
AU - Park, Chang Seo
AU - Wen, Huang Chun
AU - Choi, K.
AU - Price, Jimmy
AU - Lysaght, Patrick
AU - Tseng, Hsing Huang
AU - Sharia, O.
AU - Demkov, Alex
AU - Ryan, Jason T.
AU - Lenahan, P.
N1 - Funding Information:
Manuscript received February 4, 2010; revised May 17, 2010; accepted May 19, 2010. Date of current version August 20, 2010. The works of A. Demkov and O. Sharia were supported by the National Science Foundation under Grant DMR-0548182. The review of this paper was arranged by Editor Y.-H. Shih. G. Bersuker, C. S. Park, J. Price, and P. Lysaght are with SEMATECH, Austin, TX 78741 USA. H.-C. Wen was with SEMATECH, Austin, TX 78741 USA. She is now with the Analog Technology Development Group, Texas Instruments Incorporated, Richardson, TX 75080 USA (e-mail: [email protected]). K. Choi was with SEMATECH, Austin, TX 78741 USA. He is now with the Global Foundries, IBM T. J. Watson Research Center, Yorktown Heights, NY 12524 USA. H.-H. Tseng was with SEMATECH, Austin, TX 78741 USA. He is now with Texas State University, San Marcos, TX 78666 USA. O. Sharia was with the University of Texas at Austin, Austin, TX 78712 USA. He is now with the University of Maryland, College Park, MD 20742 USA. A. Demkov is with the University of Texas at Austin, Austin, TX 78712 USA. J. T. Ryan was with The Pennsylvania State University, University Park, PA 168020 USA. He is now with the National Institute of Standards and Technology, Gaithersburg, MD 20899-8910 USA. P. Lenahan is with The Pennsylvania State University, University Park, PA 168020 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TED.2010.2051863
PY - 2010/9
Y1 - 2010/9
N2 - The effect of flatband-voltage reduction [roll-off (R-O)], which limits fabrication options for obtaining the needed band-edge threshold voltage values in transistors with highly scaled metal/high- k dielectric gate stacks, is discussed. The proposed mechanism causing this R-O phenomenon is suggested to be associated with the generation of positively charged oxygen vacancies in the interfacial SiO2 layer next to the Si substrate. The vacancies in the interfacial layer are induced by oxygen outdiffusing into the overlying high- k dielectric. The model is consistent with the variety of observations of R-O dependence on the electrode and substrate type, high- k dielectric composition and thickness, temperature, etc. The model's predictions were experimentally verified.
AB - The effect of flatband-voltage reduction [roll-off (R-O)], which limits fabrication options for obtaining the needed band-edge threshold voltage values in transistors with highly scaled metal/high- k dielectric gate stacks, is discussed. The proposed mechanism causing this R-O phenomenon is suggested to be associated with the generation of positively charged oxygen vacancies in the interfacial SiO2 layer next to the Si substrate. The vacancies in the interfacial layer are induced by oxygen outdiffusing into the overlying high- k dielectric. The model is consistent with the variety of observations of R-O dependence on the electrode and substrate type, high- k dielectric composition and thickness, temperature, etc. The model's predictions were experimentally verified.
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U2 - 10.1109/TED.2010.2051863
DO - 10.1109/TED.2010.2051863
M3 - Article
AN - SCOPUS:77956045274
SN - 0018-9383
VL - 57
SP - 2047
EP - 2056
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 9
M1 - 5552226
ER -