TY - GEN
T1 - O2C
T2 - ISLPED'08: 13th ACM/IEEE International Symposium on Low Power Electronics and Design
AU - Ghosh, Swaroop
AU - Choi, Jung Hwan
AU - Ndai, Patrick
AU - Roy, Kaushik
PY - 2008
Y1 - 2008
N2 - In this paper, we propose O2C, a novel non-speculative adaptive thermal management technique that reduces the temperature during die-overheating using supply voltage scaling, while maintaining the rated clock frequency. This is accomplished by (a) scaling down the supply voltage, (b) isolating and predicting the set of critical paths, (c) ensuring (by design) that they are activated rarely, and (d) getting around occasional delay failures (at reduced voltage during dieoverheating) in these paths by two-cycle operations (assuming all standard operations are single-cycle). Two-cycle operation is achieved by stalling the pipeline for extra clock cycles whenever the set of critical paths are activated. The rare two-cycle operation results in a small decrease in IPC (instructions per cycle). Since O2C maintains the rated clock frequency and does not require pipeline stalling during supply voltage ramp-up/ramp-down, it achieves high throughput in a thermally constrained environment. We applied O2C to the integer execution units of an in-order superscalar pipeline. Standard full-chip Dynamic Voltage-Frequency Scaling (DVFS) is very effective in bringing down the temperature, however; it is associated with large throughput loss due to pipeline stalling and slow operating frequency during thermal management. We integrated "O 2C with standard DVFS" (called O2Cα) to demonstrate that it can act as a "first step" before full-scale thermal management is required. Our simulations indeed reveal that O 2Cα policy can avoid the requirement of full-scale DVFS during execution of programs.
AB - In this paper, we propose O2C, a novel non-speculative adaptive thermal management technique that reduces the temperature during die-overheating using supply voltage scaling, while maintaining the rated clock frequency. This is accomplished by (a) scaling down the supply voltage, (b) isolating and predicting the set of critical paths, (c) ensuring (by design) that they are activated rarely, and (d) getting around occasional delay failures (at reduced voltage during dieoverheating) in these paths by two-cycle operations (assuming all standard operations are single-cycle). Two-cycle operation is achieved by stalling the pipeline for extra clock cycles whenever the set of critical paths are activated. The rare two-cycle operation results in a small decrease in IPC (instructions per cycle). Since O2C maintains the rated clock frequency and does not require pipeline stalling during supply voltage ramp-up/ramp-down, it achieves high throughput in a thermally constrained environment. We applied O2C to the integer execution units of an in-order superscalar pipeline. Standard full-chip Dynamic Voltage-Frequency Scaling (DVFS) is very effective in bringing down the temperature, however; it is associated with large throughput loss due to pipeline stalling and slow operating frequency during thermal management. We integrated "O 2C with standard DVFS" (called O2Cα) to demonstrate that it can act as a "first step" before full-scale thermal management is required. Our simulations indeed reveal that O 2Cα policy can avoid the requirement of full-scale DVFS during execution of programs.
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U2 - 10.1145/1393921.1393971
DO - 10.1145/1393921.1393971
M3 - Conference contribution
AN - SCOPUS:57549095612
SN - 9781605581095
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
SP - 189
EP - 192
BT - ISLPED'08
Y2 - 11 August 2008 through 13 August 2008
ER -