Packaging of multi-core microprocessors: Tradeoffs and potential solutions

Prathap Muthana, Madhavan Swaminathan, Rao Tummala, Venkatesh Sundaram, Lixi Wan, S. K. Bhattacharya, P. M. Raj

Research output: Contribution to journalConference articlepeer-review

7 Scopus citations


Power consumption and interconnect latency are becoming major bottlenecks in the design of high performance computers and microprocessors. In this paper we propose to use a multi-core processor approach to improve the performance of a processor. This paper discusses an analysis of the performance trade off's between single and multi-core processors based on power, frequency, bandwidth and the role of embedded passives with high density wiring in future packages to support such processors.

Original languageEnglish (US)
Pages (from-to)1895-1903
Number of pages9
JournalProceedings - Electronic Components and Technology Conference
StatePublished - 2005
Event55th Electronic Components and Technology Conference, ECTC - Lake Buena Vista, FL, United States
Duration: May 31 2005Jun 4 2005

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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