Paving the Way for Pass Disturb-Free Vertical NAND Storage via a Dedicated and String-Compatible Pass Gate

  • Zijian Zhao
  • , Sola Woo
  • , Khandker Akif Aabrar
  • , Sharadindu Gopal Kirtania
  • , Zhouhang Jiang
  • , Shan Deng
  • , Yi Xiao
  • , Halid Mulaosmanovic
  • , Stefan Duenkel
  • , Dominik Kleimaier
  • , Steven Soss
  • , Sven Beyer
  • , Rajiv Joshi
  • , Scott Meninger
  • , Mohamed Mohamed
  • , Kijoon Kim
  • , Jongho Woo
  • , Suhwan Lim
  • , Kwangsoo Kim
  • , Wanki Kim
  • Daewon Ha, Vijaykrishnan Narayanan, Suman Datta, Shimeng Yu, Kai Ni

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

In this work, we propose a dual-port cell design to address the pass disturbance in vertical NAND storage, which can pass signals through a dedicated and string-compatible pass gate. We demonstrate that (i) the pass disturb-free feature originates from weakening of the depolarization field by the pass bias at the high-VTH (HVT) state and the screening of the applied field by the channel at the low-VTH (LVT) state; (ii) combined simulations and experimental demonstrations of dual-port design verify the disturb-free operation in a NAND string, overcoming a key challenge in single-port designs; (iii) the proposed design can be incorporated into a highly scaled vertical NAND FeFET string, and the pass gate can be incorporated into the existing three-dimensional (3D) NAND with the negligible overhead of the pass gate interconnection through a global bottom pass gate contact in the substrate.

Original languageEnglish (US)
JournalACS Applied Materials and Interfaces
DOIs
StateAccepted/In press - 2024

All Science Journal Classification (ASJC) codes

  • General Materials Science

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