Abstract
A queueing model for performance evaluation of cluster- based multiprocessors is proposed in this correspondence. Most system components are modeled as M / D / 1 / L queues to capture deterministic service time and finite buffer behavior. Various subsystems are analyzed independently and then integrated for the system level analysis. Average delay, throughput, and processor utilization are the performance parameters studied in this analysis. The analytical results are first validated via simulation. Next, several design alternatives are discussed using the model. These include the effect of buffer length and identification of bottleneck centers for various design configurations.
Original language | English (US) |
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Pages (from-to) | 109-114 |
Number of pages | 6 |
Journal | IEEE Transactions on Computers |
Volume | 43 |
Issue number | 1 |
DOIs | |
State | Published - Jan 1994 |
All Science Journal Classification (ASJC) codes
- Software
- Theoretical Computer Science
- Hardware and Architecture
- Computational Theory and Mathematics