Abstract
A quantitative evaluation of the convolution back projection (CBP) algorithm for spotlight mode synthetic-aperture radar (SAR) is presented and its performance is compared with the FFT method with respect to parameters such as multiplicative noise ratio, CPU time, and computational complexity. The architecture required for a digital processor designed to implement the CBP SAR algorithm in real-time is also discussed. It is shown that the CBP SAR algorithm is a high-quality reconstruction method, and that the processor architecture implied by the algorithm has features that lead to real-time, parallel implementations that are attractive for VLSI implementation.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1335-1338 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| State | Published - Dec 1 1985 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering