TY - JOUR
T1 - Polycrystalline silicon/dielectric/substrate material systems for thin film transistor applications
T2 - The impact of material properties on transistors' characteristics
AU - Wang, Y. Z.
AU - Awadelkarim, O. O.
PY - 1999/12
Y1 - 1999/12
N2 - Polycrystalline silicon (poly-Si) thin film transistors (TFTs) are currently attracting a great deal of attention for use as pixel switching elements and as driving elements in active matrix liquid crystal displays. For these applications, high quality poly-Si films on glass substrates associated with low thermal budget are necessary for fabricating high performance and long-term reliable poly-Si TFTs. We report herein on a comprehensive study of material qualities of poly-Si produced by low temperature solid-phase crystallization (SPC) and metal-induced SPC (MISPC). We subsequently fabricate n-channel TFTs on the SPC and MISPC crystallized poly-Si and study their properties. The parameter space investigated includes a-Si:H deposition conditions, substrate type, glass substrate coating, glass substrate treatment, metal type, and metal/coating film thickness. Mechanisms for SPC and MISPC kinetics are proposed and variations in TFT's leakage current, threshold voltage, subthreshold swing are interpreted in terms of models incorporating generation/population of traps in the poly-Si channel, bulk gate-oxide, or poly-Si/gate-oxide interface coupled with field emission of carriers from these traps.
AB - Polycrystalline silicon (poly-Si) thin film transistors (TFTs) are currently attracting a great deal of attention for use as pixel switching elements and as driving elements in active matrix liquid crystal displays. For these applications, high quality poly-Si films on glass substrates associated with low thermal budget are necessary for fabricating high performance and long-term reliable poly-Si TFTs. We report herein on a comprehensive study of material qualities of poly-Si produced by low temperature solid-phase crystallization (SPC) and metal-induced SPC (MISPC). We subsequently fabricate n-channel TFTs on the SPC and MISPC crystallized poly-Si and study their properties. The parameter space investigated includes a-Si:H deposition conditions, substrate type, glass substrate coating, glass substrate treatment, metal type, and metal/coating film thickness. Mechanisms for SPC and MISPC kinetics are proposed and variations in TFT's leakage current, threshold voltage, subthreshold swing are interpreted in terms of models incorporating generation/population of traps in the poly-Si channel, bulk gate-oxide, or poly-Si/gate-oxide interface coupled with field emission of carriers from these traps.
UR - http://www.scopus.com/inward/record.url?scp=0033335232&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0033335232&partnerID=8YFLogxK
U2 - 10.1002/(SICI)1521-396X(199912)176:2<885::AID-PSSA885>3.0.CO;2-L
DO - 10.1002/(SICI)1521-396X(199912)176:2<885::AID-PSSA885>3.0.CO;2-L
M3 - Article
AN - SCOPUS:0033335232
SN - 0031-8965
VL - 176
SP - 885
EP - 909
JO - Physica Status Solidi (A) Applied Research
JF - Physica Status Solidi (A) Applied Research
IS - 2
ER -