TY - GEN
T1 - Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network (Invited Paper)
AU - Xie, Yuan
AU - Eachempati, Soumya
AU - Yanamandra, Aditya
AU - Narayanan, Vijaykrishnan
AU - Irwin, Mary Jane
PY - 2009
Y1 - 2009
N2 - The gigahertz.frequency regime together with the rising delay of on-chip interconnect and increased device densities, has resulted in aggravating clock skew problem. Skew and power dissipation of clock distribution networks are key factors in determining the maximum attainable clock frequency as well as the chip power consumption. The traditional skew balancing schemes incur additional cost of increased area and power. In this paper, we propose a novel skew reduction mechanism using dissimilar interconnect materials for balancing the non-uniform loads in a clock network. Single walled carbon nanotube (SWCNT) bundles have been shown to have high electrical conductivity for future process technology nodes. We design a Htree clock network made up of both SWCNT bundles and copper interconnect at 22nm technology node. Our experiments show that such a network saves an average of65% in area and 22% ofpower over a pure copper distribution network.
AB - The gigahertz.frequency regime together with the rising delay of on-chip interconnect and increased device densities, has resulted in aggravating clock skew problem. Skew and power dissipation of clock distribution networks are key factors in determining the maximum attainable clock frequency as well as the chip power consumption. The traditional skew balancing schemes incur additional cost of increased area and power. In this paper, we propose a novel skew reduction mechanism using dissimilar interconnect materials for balancing the non-uniform loads in a clock network. Single walled carbon nanotube (SWCNT) bundles have been shown to have high electrical conductivity for future process technology nodes. We design a Htree clock network made up of both SWCNT bundles and copper interconnect at 22nm technology node. Our experiments show that such a network saves an average of65% in area and 22% ofpower over a pure copper distribution network.
UR - http://www.scopus.com/inward/record.url?scp=70350755734&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70350755734&partnerID=8YFLogxK
U2 - 10.1109/NANOARCH.2009.5226352
DO - 10.1109/NANOARCH.2009.5226352
M3 - Conference contribution
AN - SCOPUS:70350755734
SN - 9781424449576
T3 - 2009 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2009
SP - 51
EP - 56
BT - 2009 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2009
T2 - 2009 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2009
Y2 - 30 July 2009 through 31 July 2009
ER -