TY - GEN
T1 - Power and performance comparison of crossbars and buses as on-chip interconnect structures
AU - Zhang, Yan
AU - Irwin, Mary Jane
N1 - Publisher Copyright:
© 1999 IEEE.
PY - 1999
Y1 - 1999
N2 - Traditionally, buses have been traditionally used as datapath interconnects because of their simplicity. Yet, as technology quickly scales down and the industry embraces systems-on-A-chip (SoC), the increasing global interconnect delay and chip power consumption become big concerns, and alternative datapath interconnect structures should be considered. This paper evaluates two datapath interconnection alternatives-full connection crossbars and multiple-input/output-port buses-At the transistor level and compares their power and delay performances. The results show that although a full connection crossbar consumes more energy per cycle and incurs larger delays than buses, crossbars consume less energy per data transfer when the number of input/output ports is small and the crossbar operates in full parallelism. This makes crossbars a good choice for connecting components and transferring parallel data in SoC designs.
AB - Traditionally, buses have been traditionally used as datapath interconnects because of their simplicity. Yet, as technology quickly scales down and the industry embraces systems-on-A-chip (SoC), the increasing global interconnect delay and chip power consumption become big concerns, and alternative datapath interconnect structures should be considered. This paper evaluates two datapath interconnection alternatives-full connection crossbars and multiple-input/output-port buses-At the transistor level and compares their power and delay performances. The results show that although a full connection crossbar consumes more energy per cycle and incurs larger delays than buses, crossbars consume less energy per data transfer when the number of input/output ports is small and the crossbar operates in full parallelism. This makes crossbars a good choice for connecting components and transferring parallel data in SoC designs.
UR - http://www.scopus.com/inward/record.url?scp=0033345970&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0033345970&partnerID=8YFLogxK
U2 - 10.1109/ACSSC.1999.832356
DO - 10.1109/ACSSC.1999.832356
M3 - Conference contribution
AN - SCOPUS:0033345970
T3 - Conference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers
SP - 378
EP - 383
BT - Conference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers
A2 - Matthews, Michael B.
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 33rd Asilomar Conference on Signals, Systems, and Computers, ACSSC 1999
Y2 - 24 October 1999 through 27 October 1999
ER -