TY - GEN
T1 - Power attack resistant cryptosystem design
T2 - Design, Automation and Test in Europe, DATE '05
AU - Yang, Shengqi
AU - Wolf, Wayne
AU - Vijaykrishnan, N.
AU - Serpanos, D. N.
AU - Xie, Yuan
N1 - Copyright:
Copyright 2011 Elsevier B.V., All rights reserved.
PY - 2005
Y1 - 2005
N2 - A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques that can protect cryptosystems from leaking information have been studied by several groups. Power attacks, which infer program behavior from observing power supply current into a processor core, are important forms of attacks. Various methods have been proposed to countermeasure the popular and efficient power attacks. However, these methods do not adequately protect against power attacks and may introduce new vulnerabilities. In this work, we addressed a novel approach against the power attacks, i.e., Dynamic Voltage and Frequency Switching (DVFS). Three designs, naive, improved and advanced implementations, have been studied to test the efficiency of DVFS against power attacks. A final advanced realization of our novel cryptosystem was given out, which achieved enough high power trace entropy and time trace entropy to block all kinds of power attacks, with 27% energy reduction and 16% time overhead for DES encryption and decryption algorithms.
AB - A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques that can protect cryptosystems from leaking information have been studied by several groups. Power attacks, which infer program behavior from observing power supply current into a processor core, are important forms of attacks. Various methods have been proposed to countermeasure the popular and efficient power attacks. However, these methods do not adequately protect against power attacks and may introduce new vulnerabilities. In this work, we addressed a novel approach against the power attacks, i.e., Dynamic Voltage and Frequency Switching (DVFS). Three designs, naive, improved and advanced implementations, have been studied to test the efficiency of DVFS against power attacks. A final advanced realization of our novel cryptosystem was given out, which achieved enough high power trace entropy and time trace entropy to block all kinds of power attacks, with 27% energy reduction and 16% time overhead for DES encryption and decryption algorithms.
UR - http://www.scopus.com/inward/record.url?scp=33646941898&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33646941898&partnerID=8YFLogxK
U2 - 10.1109/DATE.2005.241
DO - 10.1109/DATE.2005.241
M3 - Conference contribution
AN - SCOPUS:33646941898
SN - 0769522882
SN - 9780769522883
T3 - Proceedings -Design, Automation and Test in Europe, DATE '05
SP - 64
EP - 69
BT - Proceedings - Design, Automation and Test in Europe - Designers' Forum, DATE '05
Y2 - 7 March 2005 through 11 March 2005
ER -