Abstract
This paper focuses on partitioning the cache resources architecturally for energy and energy-delay optimizations. Specifically, we investigate ways of splitting the cache into several smaller units, each of which is a cache by itself (called subcache). Subcache architectures not only reduce the per-access energy costs but can potentially improve the locality behavior as well. We present a unified framework for designing, implementing and evaluating different subcache architectures. Different techniques for data placement, subcache prediction, and selective probing are proposed and evaluated using a diverse set of applications. The results show that intelligent subcache mechanisms proposed in this paper are effective.
| Original language | English (US) |
|---|---|
| Pages | 64-67 |
| Number of pages | 4 |
| DOIs | |
| State | Published - 2001 |
| Event | International Symposium on Low Electronics and Design (ISLPED'01) - Huntington Beach, CA, United States Duration: Aug 6 2001 → Aug 7 2001 |
Other
| Other | International Symposium on Low Electronics and Design (ISLPED'01) |
|---|---|
| Country/Territory | United States |
| City | Huntington Beach, CA |
| Period | 8/6/01 → 8/7/01 |
All Science Journal Classification (ASJC) codes
- General Engineering