TY - GEN
T1 - Process design kit and design automation for flexible hybrid electronics
AU - Huang, Tsung Ching
AU - Lei, Ting
AU - Shao, Leilai
AU - Sivapurapu, Sridhar
AU - Swaminathan, Madhavan
AU - Li, Sicheng
AU - Bao, Zhenan
AU - Cheng, Kwang Ting
AU - Beausoleil, Raymond
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/4
Y1 - 2019/4
N2 - High-performance low-cost flexible hybrid electronics (FHE) are desirable for applications such as internet of things (IoT) and wearable electronics. Carbon-nanotube (CNT) thin-film transistor (TFT) is a promising candidate for high-performance FHE, because of its high carrier mobility, superior mechanical flexibility, and material compatibility with low-cost printing and solution-processes. Flexible sensors and peripheral CNT-TFT circuits, such as decoders, drivers and sense amplifiers, can be printed and hybrid-integrated with thinned (<50μm) silicon chips on soft, thin, and flexible substrates for a wide range of applications from flexible displays to wearable medical devices. Here we report: 1) process design kit (PDK) to enable FHE design automation for large-scale FHE circuits, and 2) solution-process proven intellectual property (IP) blocks for TFT circuits design, including Pseudo-CMOS [1] flexible digital logic and analog amplifiers shown in Figure 1.
AB - High-performance low-cost flexible hybrid electronics (FHE) are desirable for applications such as internet of things (IoT) and wearable electronics. Carbon-nanotube (CNT) thin-film transistor (TFT) is a promising candidate for high-performance FHE, because of its high carrier mobility, superior mechanical flexibility, and material compatibility with low-cost printing and solution-processes. Flexible sensors and peripheral CNT-TFT circuits, such as decoders, drivers and sense amplifiers, can be printed and hybrid-integrated with thinned (<50μm) silicon chips on soft, thin, and flexible substrates for a wide range of applications from flexible displays to wearable medical devices. Here we report: 1) process design kit (PDK) to enable FHE design automation for large-scale FHE circuits, and 2) solution-process proven intellectual property (IP) blocks for TFT circuits design, including Pseudo-CMOS [1] flexible digital logic and analog amplifiers shown in Figure 1.
UR - http://www.scopus.com/inward/record.url?scp=85068620958&partnerID=8YFLogxK
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U2 - 10.1109/VLSI-DAT.2019.8741745
DO - 10.1109/VLSI-DAT.2019.8741745
M3 - Conference contribution
AN - SCOPUS:85068620958
T3 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
BT - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
Y2 - 22 April 2019 through 25 April 2019
ER -