Protecting code regions on asymmetrically reliable caches

Sanem Arslan, Haluk Rahmi Topcuoglu, Mahmut Kandemir, Oguz Tosun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations


Cache structures in a multicore system are considerably susceptible to soft errors. Protecting all caches using fault tolerance techniques has notable overheads on performance and power consumption. In this paper, we propose an enhanced protection mechanism for reliabilitybased critical code regions of the applications on asymmetrically reliable cores which have different error-tolerant cache structures. In this system, software threads which execute reliability-based critical code regions are mapped onto the protected cores, whereas the threads which execute noncritical regions are mapped to the unprotected ones, dynamically during the execution. Our experimental evaluations indicate that the proposed system improves Silent Data Corruption (SDC) rate by 66% with 22% performance loss and 1.2% more power consumption for selected applications relative to the unprotected caches on average.

Original languageEnglish (US)
Title of host publicationArchitecture of Computing Systems - 29th International Conference, ARCS 2016, Proceedings
EditorsFrank Hannig, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich, João M.P. Cardoso, Thilo Pionteck
PublisherSpringer Verlag
Number of pages13
ISBN (Print)9783319306940
StatePublished - 2016
Event29th International Conference on Architecture of Computing Systems, ARCS 2016 - Nuremberg, Germany
Duration: Apr 4 2016Apr 7 2016

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Other29th International Conference on Architecture of Computing Systems, ARCS 2016

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • General Computer Science


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