TY - GEN
T1 - Protecting code regions on asymmetrically reliable caches
AU - Arslan, Sanem
AU - Topcuoglu, Haluk Rahmi
AU - Kandemir, Mahmut
AU - Tosun, Oguz
N1 - Publisher Copyright:
© Springer International Publishing Switzerland 2016.
PY - 2016
Y1 - 2016
N2 - Cache structures in a multicore system are considerably susceptible to soft errors. Protecting all caches using fault tolerance techniques has notable overheads on performance and power consumption. In this paper, we propose an enhanced protection mechanism for reliabilitybased critical code regions of the applications on asymmetrically reliable cores which have different error-tolerant cache structures. In this system, software threads which execute reliability-based critical code regions are mapped onto the protected cores, whereas the threads which execute noncritical regions are mapped to the unprotected ones, dynamically during the execution. Our experimental evaluations indicate that the proposed system improves Silent Data Corruption (SDC) rate by 66% with 22% performance loss and 1.2% more power consumption for selected applications relative to the unprotected caches on average.
AB - Cache structures in a multicore system are considerably susceptible to soft errors. Protecting all caches using fault tolerance techniques has notable overheads on performance and power consumption. In this paper, we propose an enhanced protection mechanism for reliabilitybased critical code regions of the applications on asymmetrically reliable cores which have different error-tolerant cache structures. In this system, software threads which execute reliability-based critical code regions are mapped onto the protected cores, whereas the threads which execute noncritical regions are mapped to the unprotected ones, dynamically during the execution. Our experimental evaluations indicate that the proposed system improves Silent Data Corruption (SDC) rate by 66% with 22% performance loss and 1.2% more power consumption for selected applications relative to the unprotected caches on average.
UR - http://www.scopus.com/inward/record.url?scp=84962428768&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84962428768&partnerID=8YFLogxK
U2 - 10.1007/978-3-319-30695-7_28
DO - 10.1007/978-3-319-30695-7_28
M3 - Conference contribution
AN - SCOPUS:84962428768
SN - 9783319306940
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 375
EP - 387
BT - Architecture of Computing Systems - 29th International Conference, ARCS 2016, Proceedings
A2 - Hannig, Frank
A2 - Fey, Dietmar
A2 - Schröder-Preikschat, Wolfgang
A2 - Teich, Jürgen
A2 - Cardoso, João M.P.
A2 - Pionteck, Thilo
PB - Springer Verlag
T2 - 29th International Conference on Architecture of Computing Systems, ARCS 2016
Y2 - 4 April 2016 through 7 April 2016
ER -